Lines Matching +full:qcom +full:- +full:msm8996 +full:- +full:tlmm +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8996-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm MSM8996 TLMM pin controller
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
14 Top Level Mode Multiplexer pin controller in Qualcomm MSM8996 SoC.
18 const: qcom,msm8996-pinctrl
26 gpio-reserved-ranges:
30 gpio-line-names:
34 "-state$":
36 - $ref: "#/$defs/qcom-msm8996-tlmm-state"
37 - patternProperties:
38 "-pins$":
39 $ref: "#/$defs/qcom-msm8996-tlmm-state"
43 qcom-msm8996-tlmm-state:
48 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
58 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$"
59 - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk,
120 - pins
123 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
126 - compatible
127 - reg
132 - |
133 #include <dt-bindings/interrupt-controller/arm-gic.h>
135 tlmm: pinctrl@1010000 {
136 compatible = "qcom,msm8996-pinctrl";
139 gpio-controller;
140 gpio-ranges = <&tlmm 0 0 150>;
141 #gpio-cells = <2>;
142 interrupt-controller;
143 #interrupt-cells = <2>;
145 blsp1-spi1-default-state {
146 spi-pins {
149 drive-strength = <12>;
150 bias-disable;
153 cs-pins {
156 drive-strength = <16>;
157 bias-disable;
158 output-high;
162 blsp1-spi1-sleep-state {
165 drive-strength = <2>;
166 bias-pull-down;