Lines Matching +full:tegra210 +full:- +full:qspi
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra210-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra210 Pinmux Controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra210-pinmux
19 - description: APB_MISC_GP_*_PADCTRL register (pad control)
20 - description: PINMUX_AUX_* registers (pinmux)
23 "^pinmux(-[a-z0-9-_]+)?$":
28 $ref: nvidia,tegra-pinmux-common.yaml
89 pwm1, pwm2, pwm3, qspi, rsvd0, rsvd1, rsvd2, rsvd3, sata,
96 nvidia,pull-down-strength: true
97 nvidia,pull-up-strength: true
98 nvidia,high-speed-mode: true
99 nvidia,enable-input: true
100 nvidia,open-drain: true
102 nvidia,drive-type: true
103 nvidia,io-hv: true
104 nvidia,slew-rate-rising: true
105 nvidia,slew-rate-falling: true
108 - nvidia,pins
113 - compatible
114 - reg
117 - |
118 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
121 compatible = "nvidia,tegra210-pinmux";
125 pinctrl-names = "boot";
126 pinctrl-0 = <&state_boot>;
134 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
135 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
136 nvidia,io-hv = <TEGRA_PIN_ENABLE>;