Lines Matching +full:tegra194 +full:- +full:pcie
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra194-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra194 Pinmux Controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra194-pinmux
17 - nvidia,tegra194-pinmux-aon
21 - description: pinmux registers
24 "^pinmux(-[a-z0-9-_]+)?$":
29 $ref: nvidia,tegra-pinmux-common.yaml
47 nvidia,enable-input: true
48 nvidia,open-drain: true
50 nvidia,drive-type: true
51 nvidia,io-hv: true
54 - nvidia,pins
59 - if:
62 const: nvidia,tegra194-pinmux
65 "^pinmux(-[a-z0-9-_]+)?$":
75 are part of PCIE C5 power partition. Client devices must
213 - if:
216 const: nvidia,tegra194-pinmux-aon
219 "^pinmux(-[a-z0-9-_]+)?$":
257 - compatible
258 - reg
261 - |
262 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
265 compatible = "nvidia,tegra194-pinmux";
268 pinctrl-names = "pex_rst";
269 pinctrl-0 = <&pex_rst_c5_out_state>;
271 pex_rst_c5_out_state: pinmux-pex-rst-c5-out {
275 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
276 nvidia,io-hv = <TEGRA_PIN_ENABLE>;