Lines Matching +full:uart11 +full:- +full:pins
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nuvoton,ma35d1-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shan-Chun Hung <schung@nuvoton.com>
11 - Jacky Huang <ychuang3@nuvoton.com>
14 - $ref: pinctrl.yaml#
19 - nuvoton,ma35d1-pinctrl
24 '#address-cells':
27 '#size-cells':
33 phandle of the system-management node.
38 "^gpio@[0-9a-f]+$":
41 gpio-controller: true
43 '#gpio-cells':
52 interrupt-controller: true
54 '#interrupt-cells':
63 - gpio-controller
64 - '#gpio-cells'
65 - reg
66 - clocks
67 - interrupt-controller
68 - '#interrupt-cells'
69 - interrupts
73 "-grp$":
79 "-pins$":
84 pins it needs, and how they should be configured, with regard to muxer
87 $ref: /schemas/pinctrl/pincfg-node.yaml
90 nuvoton,pins:
94 $ref: /schemas/types.yaml#/definitions/uint32-matrix
98 - minimum: 0
102 - minimum: 0
106 - minimum: 0
111 power-source:
118 drive-strength-microamp:
120 - enum: [ 2900, 4400, 5800, 7300, 8600, 10100, 11500, 13000 ]
122 - enum: [ 17100, 25600, 34100, 42800, 48000, 56000, 77000, 82000 ]
125 bias-disable: true
127 bias-pull-up: true
129 bias-pull-down: true
131 input-schmitt-disable: true
138 - compatible
139 - reg
140 - nuvoton,sys
145 - |
146 #include <dt-bindings/interrupt-controller/arm-gic.h>
147 #include <dt-bindings/gpio/gpio.h>
148 #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
151 compatible = "nuvoton,ma35d1-pinctrl";
153 #address-cells = <1>;
154 #size-cells = <1>;
162 gpio-controller;
163 #gpio-cells = <2>;
164 interrupt-controller;
165 #interrupt-cells = <2>;
168 uart-grp {
169 uart11-pins {
170 nuvoton,pins = <11 0 2>,
174 power-source = <1>;
175 bias-disable;