Lines Matching +full:enable +full:- +full:bias +full:- +full:control

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/intel,pinctrl-keembay.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
13   Intel Keem Bay SoC integrates a pin controller which enables control
19     const: intel,keembay-pinctrl
24   gpio-controller: true
26   '#gpio-cells':
39   interrupt-controller: true
41   '#interrupt-cells':
45   '^gpio@[0-9a-f]*$':
60       bias-disable: true
62       bias-pull-down: true
64       bias-pull-up: true
66       drive-strength:
70       bias-bus-hold:
73       input-schmitt-enable:
76       slew-rate:
77         description: GPIO slew rate control.
78                       0 - Fast(~100MHz)
79                       1 - Slow(~50MHz)
85   - compatible
86   - reg
87   - gpio-controller
88   - ngpios
89   - '#gpio-cells'
90   - interrupts
91   - interrupt-controller
92   - '#interrupt-cells'
95   - |
96     #include <dt-bindings/interrupt-controller/arm-gic.h>
97     #include <dt-bindings/interrupt-controller/irq.h>
100         compatible = "intel,keembay-pinctrl";
103         gpio-controller;
105         #gpio-cells = <0x2>;
114         interrupt-controller;
115         #interrupt-cells = <2>;
120         compatible = "intel,keembay-pinctrl";
123         gpio-controller;
125         #gpio-cells = <0x2>;
134         interrupt-controller;
135         #interrupt-cells = <2>;