Lines Matching +full:tx +full:- +full:termination +full:- +full:fix

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/xlnx,zynqmp-psgtr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
18   "#phy-cells":
23       - description: The GTR lane
26       - description: The PHY type
28           - PHY_TYPE_DP
29           - PHY_TYPE_PCIE
30           - PHY_TYPE_SATA
31           - PHY_TYPE_SGMII
32           - PHY_TYPE_USB3
33       - description: The PHY instance
37       - description: The reference clock number
43       - xlnx,zynqmp-psgtr-v1.1
44       - xlnx,zynqmp-psgtr
50       Clock for each PS_MGTREFCLK[0-3] reference clock input. Unconnected
53   clock-names:
57       pattern: "^ref[0-3]$"
61       - description: SERDES registers block
62       - description: SIOU registers block
64   reg-names:
66       - const: serdes
67       - const: siou
69   xlnx,tx-termination-fix:
71       Include this for fixing functional issue with the TX termination
77   - "#phy-cells"
78   - compatible
79   - reg
80   - reg-names
85       const: xlnx,zynqmp-psgtr-v1.1
89     xlnx,tx-termination-fix: false
94   - |
96         compatible = "xlnx,zynqmp-psgtr-v1.1";
99         reg-names = "serdes", "siou";
101         clock-names = "ref1", "ref2", "ref3";
102         #phy-cells = <4>;