Lines Matching +full:uniphier +full:- +full:ld20 +full:- +full:usb3 +full:- +full:hsphy

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-usb3hs-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier USB3 High-Speed (HS) PHY
11   USB3 controller implemented on Socionext UniPhier SoCs.
12   Although the controller includes High-Speed PHY and Super-Speed PHY,
13   this describes about High-Speed PHY.
16   - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
21       - socionext,uniphier-pro5-usb3-hsphy
22       - socionext,uniphier-pxs2-usb3-hsphy
23       - socionext,uniphier-ld20-usb3-hsphy
24       - socionext,uniphier-pxs3-usb3-hsphy
25       - socionext,uniphier-nx1-usb3-hsphy
30   "#phy-cells":
37   clock-names:
44   reset-names:
47   vbus-supply:
50   nvmem-cells:
54       Available only for HS-PHY implemented on LD20 and PXs3, and
57   nvmem-cell-names:
59       - const: rterm
60       - const: sel_t
61       - const: hs_i
63       Should be the following names, which correspond to each nvmem-cells.
69   - if:
73             const: socionext,uniphier-pro5-usb3-hsphy
79         clock-names:
81             - const: gio
82             - const: link
86         reset-names:
88             - const: gio
89             - const: link
90   - if:
95               - socionext,uniphier-pxs2-usb3-hsphy
96               - socionext,uniphier-ld20-usb3-hsphy
102         clock-names:
104             - const: link
105             - const: phy
109         reset-names:
111             - const: link
112             - const: phy
113   - if:
118               - socionext,uniphier-pxs3-usb3-hsphy
119               - socionext,uniphier-nx1-usb3-hsphy
125         clock-names:
128             - const: link
129             - const: phy
130             - const: phy-ext
134         reset-names:
136             - const: link
137             - const: phy
140   - compatible
141   - reg
142   - "#phy-cells"
143   - clocks
144   - clock-names
145   - resets
146   - reset-names
151   - |
153         compatible = "socionext,uniphier-ld20-usb3-hsphy";
155         #phy-cells = <0>;
156         clock-names = "link", "phy";
158         reset-names = "link", "phy";
160         vbus-supply = <&usb_vbus0>;
161         nvmem-cell-names = "rterm", "sel_t", "hs_i";
162         nvmem-cells = <&usb_rterm0>, <&usb_sel_t0>, <&usb_hs_i0>;