Lines Matching +full:vdd33 +full:- +full:supply
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,usb3-drd-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Marek Szyprowski <m.szyprowski@samsung.com>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
15 For samsung,exynos5250-usbdrd-phy and samsung,exynos5420-usbdrd-phy
18 0 - UTMI+ type phy,
19 1 - PIPE3 type phy.
28 - google,gs101-usb31drd-phy
29 - samsung,exynos2200-usb32drd-phy
30 - samsung,exynos5250-usbdrd-phy
31 - samsung,exynos5420-usbdrd-phy
32 - samsung,exynos5433-usbdrd-phy
33 - samsung,exynos7-usbdrd-phy
34 - samsung,exynos7870-usbdrd-phy
35 - samsung,exynos850-usbdrd-phy
36 - samsung,exynos990-usbdrd-phy
42 clock-names:
47 - Main PHY clock (same as USB DRD controller i.e. DWC3 IP clock), used
49 - PHY reference clock (usually crystal clock), used for PHY operations,
54 "#phy-cells":
60 USBDRD-underlying high-speed PHY
62 phy-names:
75 reg-names:
78 - const: phy
79 - const: pcs
80 - const: pma
82 samsung,pmu-syscon:
87 vbus-supply:
91 vbus-boost-supply:
95 pll-supply:
96 description: Power supply for the USB PLL.
98 dvdd-usb20-supply:
99 description: DVDD power supply for the USB 2.0 phy.
101 vddh-usb20-supply:
102 description: VDDh power supply for the USB 2.0 phy.
104 vdd33-usb20-supply:
105 description: 3.3V power supply for the USB 2.0 phy.
107 vdda-usbdp-supply:
108 description: VDDa power supply for the USB DP phy.
110 vddh-usbdp-supply:
111 description: VDDh power supply for the USB DP phy.
114 - compatible
115 - clocks
116 - clock-names
117 - "#phy-cells"
118 - reg
119 - samsung,pmu-syscon
122 - if:
126 const: google,gs101-usb31drd-phy
128 $ref: /schemas/usb/usb-switch.yaml#
133 - description: Gate of main PHY clock
134 - description: Gate of PHY reference clock
135 - description: Gate of control interface AXI clock
136 - description: Gate of control interface APB clock
137 - description: Gate of SCL APB clock
139 clock-names:
141 - const: phy
142 - const: ref
143 - const: ctrl_aclk
144 - const: ctrl_pclk
145 - const: scl_pclk
150 reg-names:
154 - reg-names
155 - orientation-switch
156 - port
157 - pll-supply
158 - dvdd-usb20-supply
159 - vddh-usb20-supply
160 - vdd33-usb20-supply
161 - vdda-usbdp-supply
162 - vddh-usbdp-supply
164 - if:
169 - samsung,exynos2200-usb32drd-phy
174 clock-names:
176 - const: phy
179 reg-names:
182 - phys
183 - phy-names
185 - if:
190 - samsung,exynos5433-usbdrd-phy
191 - samsung,exynos7-usbdrd-phy
198 clock-names:
200 - const: phy
201 - const: ref
202 - const: phy_utmi
203 - const: phy_pipe
204 - const: itp
209 reg-names:
212 - if:
217 - samsung,exynos5250-usbdrd-phy
218 - samsung,exynos5420-usbdrd-phy
219 - samsung,exynos7870-usbdrd-phy
220 - samsung,exynos850-usbdrd-phy
221 - samsung,exynos990-usbdrd-phy
228 clock-names:
230 - const: phy
231 - const: ref
236 reg-names:
242 - |
243 #include <dt-bindings/clock/exynos5420.h>
246 compatible = "samsung,exynos5420-usbdrd-phy";
248 #phy-cells = <1>;
250 clock-names = "phy", "ref";
251 samsung,pmu-syscon = <&pmu_system_controller>;
252 vbus-supply = <&usb300_vbus_reg>;