Lines Matching +full:exynos5250 +full:- +full:clock
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,usb3-drd-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Marek Szyprowski <m.szyprowski@samsung.com>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
15 For samsung,exynos5250-usbdrd-phy and samsung,exynos5420-usbdrd-phy
18 0 - UTMI+ type phy,
19 1 - PIPE3 type phy.
28 - google,gs101-usb31drd-phy
29 - samsung,exynos5250-usbdrd-phy
30 - samsung,exynos5420-usbdrd-phy
31 - samsung,exynos5433-usbdrd-phy
32 - samsung,exynos7-usbdrd-phy
33 - samsung,exynos850-usbdrd-phy
39 clock-names:
44 - Main PHY clock (same as USB DRD controller i.e. DWC3 IP clock), used
46 - PHY reference clock (usually crystal clock), used for PHY operations,
47 associated by phy name. It is used to determine bit values for clock
51 "#phy-cells":
64 reg-names:
67 - const: phy
68 - const: pcs
69 - const: pma
71 samsung,pmu-syscon:
76 vbus-supply:
80 vbus-boost-supply:
84 pll-supply:
86 dvdd-usb20-supply:
88 vddh-usb20-supply:
90 vdd33-usb20-supply:
92 vdda-usbdp-supply:
94 vddh-usbdp-supply:
98 - compatible
99 - clocks
100 - clock-names
101 - "#phy-cells"
102 - reg
103 - samsung,pmu-syscon
106 - if:
110 const: google,gs101-usb31drd-phy
115 - description: Gate of main PHY clock
116 - description: Gate of PHY reference clock
117 - description: Gate of control interface AXI clock
118 - description: Gate of control interface APB clock
119 - description: Gate of SCL APB clock
120 clock-names:
122 - const: phy
123 - const: ref
124 - const: ctrl_aclk
125 - const: ctrl_pclk
126 - const: scl_pclk
129 reg-names:
132 - reg-names
133 - pll-supply
134 - dvdd-usb20-supply
135 - vddh-usb20-supply
136 - vdd33-usb20-supply
137 - vdda-usbdp-supply
138 - vddh-usbdp-supply
140 - if:
145 - samsung,exynos5433-usbdrd-phy
146 - samsung,exynos7-usbdrd-phy
152 clock-names:
154 - const: phy
155 - const: ref
156 - const: phy_utmi
157 - const: phy_pipe
158 - const: itp
161 reg-names:
164 - if:
169 - samsung,exynos5250-usbdrd-phy
170 - samsung,exynos5420-usbdrd-phy
171 - samsung,exynos850-usbdrd-phy
177 clock-names:
179 - const: phy
180 - const: ref
183 reg-names:
189 - |
190 #include <dt-bindings/clock/exynos5420.h>
193 compatible = "samsung,exynos5420-usbdrd-phy";
195 #phy-cells = <1>;
196 clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBPHY300>;
197 clock-names = "phy", "ref";
198 samsung,pmu-syscon = <&pmu_system_controller>;
199 vbus-supply = <&usb300_vbus_reg>;