Lines Matching +full:exynos5250 +full:- +full:clock
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,usb2-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Marek Szyprowski <m.szyprowski@samsung.com>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
18 0 - USB device ("device"),
19 1 - USB host ("host"),
20 2 - HSIC0 ("hsic0"),
21 3 - HSIC1 ("hsic1"),
30 - samsung,exynos3250-usb2-phy
31 - samsung,exynos4210-usb2-phy
32 - samsung,exynos4x12-usb2-phy
33 - samsung,exynos5250-usb2-phy
34 - samsung,exynos5420-usb2-phy
35 - samsung,s5pv210-usb2-phy
39 - description: PHY module gate clock.
40 - description: Reference rate clock of PHY module.
42 clock-names:
44 - const: phy
45 - const: ref
47 "#phy-cells":
53 samsung,pmureg-phandle:
58 samsung,sysreg-phandle:
63 vbus-supply:
68 - compatible
69 - clocks
70 - clock-names
71 - "#phy-cells"
72 - reg
73 - samsung,pmureg-phandle
76 - if:
81 - samsung,exynos4x12-usb2-phy
82 - samsung,exynos5250-usb2-phy
83 - samsung,exynos5420-usb2-phy
86 - samsung,sysreg-phandle
91 - |
92 #include <dt-bindings/clock/exynos5420.h>
95 compatible = "samsung,exynos5420-usb2-phy";
97 #phy-cells = <1>;
98 clocks = <&clock CLK_USBH20>, <&clock CLK_SCLK_USBPHY300>;
99 clock-names = "phy", "ref";
100 samsung,sysreg-phandle = <&sysreg_system_controller>;
101 samsung,pmureg-phandle = <&pmu_system_controller>;