Lines Matching +full:r9a07g044 +full:- +full:sysc
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/renesas,usb2-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car generation 3 USB 2.0 PHY
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - items:
16 - enum:
17 - renesas,usb2-phy-r8a77470 # RZ/G1C
18 - renesas,usb2-phy-r9a08g045 # RZ/G3S
20 - items:
21 - enum:
22 - renesas,usb2-phy-r7s9210 # RZ/A2
23 - renesas,usb2-phy-r8a774a1 # RZ/G2M
24 - renesas,usb2-phy-r8a774b1 # RZ/G2N
25 - renesas,usb2-phy-r8a774c0 # RZ/G2E
26 - renesas,usb2-phy-r8a774e1 # RZ/G2H
27 - renesas,usb2-phy-r8a7795 # R-Car H3
28 - renesas,usb2-phy-r8a7796 # R-Car M3-W
29 - renesas,usb2-phy-r8a77961 # R-Car M3-W+
30 - renesas,usb2-phy-r8a77965 # R-Car M3-N
31 - renesas,usb2-phy-r8a77990 # R-Car E3
32 - renesas,usb2-phy-r8a77995 # R-Car D3
33 - const: renesas,rcar-gen3-usb2-phy
35 - items:
36 - enum:
37 - renesas,usb2-phy-r9a07g043 # RZ/G2UL
38 - renesas,usb2-phy-r9a07g044 # RZ/G2{L,LC}
39 - renesas,usb2-phy-r9a07g054 # RZ/V2L
40 - const: renesas,rzg2l-usb2-phy
49 clock-names:
52 - const: fck
53 - const: usb_x1
55 '#phy-cells':
60 - 1 = USBH_INTA (OHCI)
61 - 2 = USBH_INTB (EHCI)
62 - 3 = UCOM_INT (OTG and BC)
67 power-domains:
73 - description: reset of USB 2.0 host side
74 - description: reset of USB 2.0 peripheral side
76 vbus-supply:
81 renesas,no-otg-pins:
92 const: renesas,usb2-phy-r7s9210
95 - clock-names
98 - compatible
99 - reg
100 - clocks
101 - '#phy-cells'
104 - if:
108 const: renesas,rzg2l-usb2-phy
111 - resets
116 - |
117 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
118 #include <dt-bindings/interrupt-controller/arm-gic.h>
119 #include <dt-bindings/power/r8a7795-sysc.h>
121 usb-phy@ee080200 {
122 compatible = "renesas,usb2-phy-r8a7795", "renesas,rcar-gen3-usb2-phy";
126 #phy-cells = <1>;
129 usb-phy@ee0a0200 {
130 compatible = "renesas,usb2-phy-r8a7795", "renesas,rcar-gen3-usb2-phy";
133 #phy-cells = <1>;