Lines Matching +full:usb +full:- +full:dc +full:- +full:cal
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Realtek DHC SoCs USB 2.0 PHY
11 - Stanley Chang <stanley_chang@realtek.com>
14 Realtek USB 2.0 PHY support the digital home center (DHC) RTD series SoCs.
15 The USB 2.0 PHY driver is designed to support the XHCI controller. The SoCs
19 RTD1295/RTD1619 SoCs USB
20 The USB architecture includes three XHCI controllers.
21 Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on some
23 XHCI controller#0 -- usb2phy -- phy#0
24 |- usb3phy -- phy#0
25 XHCI controller#1 -- usb2phy -- phy#0
26 XHCI controller#2 -- usb2phy -- phy#0
27 |- usb3phy -- phy#0
29 RTD1395 SoCs USB
30 The USB architecture includes two XHCI controllers.
31 The controller#0 has one USB 2.0 PHY. The controller#1 includes two USB 2.0
33 XHCI controller#0 -- usb2phy -- phy#0
34 XHCI controller#1 -- usb2phy -- phy#0
35 |- phy#1
37 RTD1319/RTD1619b SoCs USB
38 The USB architecture includes three XHCI controllers.
39 Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#2.
40 XHCI controller#0 -- usb2phy -- phy#0
41 XHCI controller#1 -- usb2phy -- phy#0
42 XHCI controller#2 -- usb2phy -- phy#0
43 |- usb3phy -- phy#0
45 RTD1319d SoCs USB
46 The USB architecture includes three XHCI controllers.
47 Each xhci maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#0.
48 XHCI controller#0 -- usb2phy -- phy#0
49 |- usb3phy -- phy#0
50 XHCI controller#1 -- usb2phy -- phy#0
51 XHCI controller#2 -- usb2phy -- phy#0
53 RTD1312c/RTD1315e SoCs USB
54 The USB architecture includes three XHCI controllers.
55 Each XHCI maps to one USB 2.0 PHY.
56 XHCI controller#0 -- usb2phy -- phy#0
57 XHCI controller#1 -- usb2phy -- phy#0
58 XHCI controller#2 -- usb2phy -- phy#0
63 - realtek,rtd1295-usb2phy
64 - realtek,rtd1312c-usb2phy
65 - realtek,rtd1315e-usb2phy
66 - realtek,rtd1319-usb2phy
67 - realtek,rtd1319d-usb2phy
68 - realtek,rtd1395-usb2phy
69 - realtek,rtd1395-usb2phy-2port
70 - realtek,rtd1619-usb2phy
71 - realtek,rtd1619b-usb2phy
75 - description: PHY data registers
76 - description: PHY control registers
78 "#phy-cells":
81 nvmem-cells:
87 nvmem-cell-names:
89 - const: usb-dc-cal
90 - const: usb-dc-dis
92 The following names, which correspond to each nvmem-cells.
93 usb-dc-cal is the driving level for each phy specified via efuse.
94 usb-dc-dis is the disconnection level for each phy specified via efuse.
96 realtek,inverse-hstx-sync-clock:
99 high-speed tx must be inverted.
102 realtek,driving-level:
113 realtek,driving-level-compensate:
121 minimum: -8
124 realtek,disconnection-compensate:
130 minimum: -8
134 - compatible
135 - reg
136 - "#phy-cells"
139 - if:
145 - realtek,rtd1619b-usb2phy
148 realtek,inverse-hstx-sync-clock: false
150 - if:
156 - realtek,rtd1315e-usb2phy
159 realtek,driving-level-compensate: false
164 - |
165 usb-phy@13214 {
166 compatible = "realtek,rtd1619b-usb2phy";
168 #phy-cells = <0>;
169 nvmem-cells = <&otp_usb_port0_dc_cal>, <&otp_usb_port0_dc_dis>;
170 nvmem-cell-names = "usb-dc-cal", "usb-dc-dis";
172 realtek,inverse-hstx-sync-clock;
173 realtek,driving-level = <0xa>;
174 realtek,disconnection-compensate = <(-1)>;