Lines Matching +full:x1e80100 +full:- +full:gcc
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP USB4-USB3-DP PHY controller (SC8280XP)
10 - Vinod Koul <vkoul@kernel.org>
19 - qcom,sar2130p-qmp-usb3-dp-phy
20 - qcom,sc7180-qmp-usb3-dp-phy
21 - qcom,sc7280-qmp-usb3-dp-phy
22 - qcom,sc8180x-qmp-usb3-dp-phy
23 - qcom,sc8280xp-qmp-usb43dp-phy
24 - qcom,sdm845-qmp-usb3-dp-phy
25 - qcom,sm6350-qmp-usb3-dp-phy
26 - qcom,sm8150-qmp-usb3-dp-phy
27 - qcom,sm8250-qmp-usb3-dp-phy
28 - qcom,sm8350-qmp-usb3-dp-phy
29 - qcom,sm8450-qmp-usb3-dp-phy
30 - qcom,sm8550-qmp-usb3-dp-phy
31 - qcom,sm8650-qmp-usb3-dp-phy
32 - qcom,sm8750-qmp-usb3-dp-phy
33 - qcom,x1e80100-qmp-usb3-dp-phy
42 clock-names:
45 - const: aux
46 - const: ref
47 - const: com_aux
48 - const: usb3_pipe
49 - const: cfg_ahb
51 power-domains:
57 reset-names:
59 - const: phy
60 - const: common
62 vdda-phy-supply: true
64 vdda-pll-supply: true
66 "#clock-cells":
69 See include/dt-bindings/phy/phy-qcom-qmp.h
71 "#phy-cells":
74 See include/dt-bindings/phy/phy-qcom-qmp.h
76 orientation-switch:
78 Flag the PHY as possible handler of USB Type-C orientation switching
97 - compatible
98 - reg
99 - clocks
100 - clock-names
101 - resets
102 - reset-names
103 - vdda-phy-supply
104 - vdda-pll-supply
105 - "#clock-cells"
106 - "#phy-cells"
109 - if:
113 - qcom,sc7180-qmp-usb3-dp-phy
114 - qcom,sdm845-qmp-usb3-dp-phy
119 clock-names:
125 clock-names:
128 - if:
132 - qcom,sar2130p-qmp-usb3-dp-phy
133 - qcom,sc8280xp-qmp-usb43dp-phy
134 - qcom,sm6350-qmp-usb3-dp-phy
135 - qcom,sm8550-qmp-usb3-dp-phy
136 - qcom,sm8650-qmp-usb3-dp-phy
137 - qcom,sm8750-qmp-usb3-dp-phy
138 - qcom,x1e80100-qmp-usb3-dp-phy
141 - power-domains
144 power-domains: false
149 - |
150 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
153 compatible = "qcom,sc8280xp-qmp-usb43dp-phy";
156 clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
157 <&gcc GCC_USB4_EUD_CLKREF_CLK>,
158 <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
159 <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
160 clock-names = "aux", "ref", "com_aux", "usb3_pipe";
162 power-domains = <&gcc USB30_PRIM_GDSC>;
164 resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
165 <&gcc GCC_USB4_DP_PHY_PRIM_BCR>;
166 reset-names = "phy", "common";
168 vdda-phy-supply = <&vreg_l9d>;
169 vdda-pll-supply = <&vreg_l4d>;
171 orientation-switch;
173 #clock-cells = <1>;
174 #phy-cells = <1>;
177 #address-cells = <1>;
178 #size-cells = <0>;
184 remote-endpoint = <&typec_connector_ss>;
192 remote-endpoint = <&dwc3_ss_out>;
200 remote-endpoint = <&mdss_dp_out>;