Lines Matching +full:gcc +full:- +full:sdm845

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP USB4-USB3-DP PHY controller (SC8280XP)
10 - Vinod Koul <vkoul@kernel.org>
19 - qcom,sc7180-qmp-usb3-dp-phy
20 - qcom,sc7280-qmp-usb3-dp-phy
21 - qcom,sc8180x-qmp-usb3-dp-phy
22 - qcom,sc8280xp-qmp-usb43dp-phy
23 - qcom,sdm845-qmp-usb3-dp-phy
24 - qcom,sm6350-qmp-usb3-dp-phy
25 - qcom,sm8150-qmp-usb3-dp-phy
26 - qcom,sm8250-qmp-usb3-dp-phy
27 - qcom,sm8350-qmp-usb3-dp-phy
28 - qcom,sm8450-qmp-usb3-dp-phy
29 - qcom,sm8550-qmp-usb3-dp-phy
30 - qcom,sm8650-qmp-usb3-dp-phy
31 - qcom,x1e80100-qmp-usb3-dp-phy
40 clock-names:
43 - const: aux
44 - const: ref
45 - const: com_aux
46 - const: usb3_pipe
47 - const: cfg_ahb
49 power-domains:
55 reset-names:
57 - const: phy
58 - const: common
60 vdda-phy-supply: true
62 vdda-pll-supply: true
64 "#clock-cells":
67 See include/dt-bindings/phy/phy-qcom-qmp.h
69 "#phy-cells":
72 See include/dt-bindings/phy/phy-qcom-qmp.h
74 orientation-switch:
76 Flag the PHY as possible handler of USB Type-C orientation switching
95 - compatible
96 - reg
97 - clocks
98 - clock-names
99 - resets
100 - reset-names
101 - vdda-phy-supply
102 - vdda-pll-supply
103 - "#clock-cells"
104 - "#phy-cells"
107 - if:
111 - qcom,sc7180-qmp-usb3-dp-phy
112 - qcom,sdm845-qmp-usb3-dp-phy
117 clock-names:
123 clock-names:
126 - if:
130 - qcom,sc8280xp-qmp-usb43dp-phy
131 - qcom,sm6350-qmp-usb3-dp-phy
132 - qcom,sm8550-qmp-usb3-dp-phy
133 - qcom,sm8650-qmp-usb3-dp-phy
134 - qcom,x1e80100-qmp-usb3-dp-phy
137 - power-domains
140 power-domains: false
145 - |
146 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
149 compatible = "qcom,sc8280xp-qmp-usb43dp-phy";
152 clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
153 <&gcc GCC_USB4_EUD_CLKREF_CLK>,
154 <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
155 <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
156 clock-names = "aux", "ref", "com_aux", "usb3_pipe";
158 power-domains = <&gcc USB30_PRIM_GDSC>;
160 resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
161 <&gcc GCC_USB4_DP_PHY_PRIM_BCR>;
162 reset-names = "phy", "common";
164 vdda-phy-supply = <&vreg_l9d>;
165 vdda-pll-supply = <&vreg_l4d>;
167 orientation-switch;
169 #clock-cells = <1>;
170 #phy-cells = <1>;
173 #address-cells = <1>;
174 #size-cells = <0>;
180 remote-endpoint = <&typec_connector_ss>;
188 remote-endpoint = <&dwc3_ss_out>;
196 remote-endpoint = <&mdss_dp_out>;