Lines Matching +full:pre +full:- +full:emphasis
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-stm32-usbphyc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
22 |_ PHY port#2 ----| |________________
27 - Amelie Delaunay <amelie.delaunay@foss.st.com>
31 const: st,stm32mp1-usbphyc
42 "#address-cells":
45 "#size-cells":
48 vdda1v1-supply:
51 vdda1v8-supply:
54 '#clock-cells':
58 access-controllers:
65 "^usb-phy@[0|1]$":
68 Each port the controller provides must be represented as a sub-node.
75 phy-supply:
78 "#phy-cells":
83 $ref: /schemas/connector/usb-connector.yaml
87 vbus-supply: true
91 # all optional parameters to tune the interface of the PHY (HS for High-Speed, FS for Full-
92 # Speed, LS for Low-Speed)
94 st,current-boost-microamp:
98 st,no-lsfs-fb-cap:
102 st,decrease-hs-slew-rate:
106 st,tune-hs-dc-level:
109 - <0> normal level
110 - <1> increases the level by 5 to 7 mV
111 - <2> increases the level by 10 to 14 mV
112 - <3> decreases the level by 5 to 7 mV
118 st,enable-fs-rftime-tuning:
122 st,enable-hs-rftime-reduction:
126 st,trim-hs-current:
129 - <0> = 18.87 mA target current / nominal + 0%
130 - <1> = 19.165 mA target current / nominal + 1.56%
131 - <2> = 19.46 mA target current / nominal + 3.12%
132 - <3> = 19.755 mA target current / nominal + 4.68%
133 - <4> = 20.05 mA target current / nominal + 6.24%
134 - <5> = 20.345 mA target current / nominal + 7.8%
135 - <6> = 20.64 mA target current / nominal + 9.36%
136 - <7> = 20.935 mA target current / nominal + 10.92%
137 - <8> = 21.23 mA target current / nominal + 12.48%
138 - <9> = 21.525 mA target current / nominal + 14.04%
139 - <10> = 21.82 mA target current / nominal + 15.6%
140 - <11> = 22.115 mA target current / nominal + 17.16%
141 - <12> = 22.458 mA target current / nominal + 19.01%
142 - <13> = 22.755 mA target current / nominal + 20.58%
143 - <14> = 23.052 mA target current / nominal + 22.16%
144 - <15> = 23.348 mA target current / nominal + 23.73%
150 st,trim-hs-impedance:
153 - <0> = no impedance offset
154 - <1> = reduce the impedance by 2 ohms
155 - <2> = reduce the impedance by 4 ohms
156 - <3> = reduce the impedance by 6 ohms
162 st,tune-squelch-level:
165 - <0> = no shift in threshold
166 - <1> = threshold shift by +7 mV
167 - <2> = threshold shift by -5 mV
168 - <3> = threshold shift by +14 mV
174 st,enable-hs-rx-gain-eq:
178 st,tune-hs-rx-offset:
181 - <0> = no offset
182 - <1> = offset of +5 mV
183 - <2> = offset of +10 mV
184 - <3> = offset of -5 mV
190 st,no-hs-ftime-ctrl:
191 description: Disables the HS fall time control of single ended signals during pre-emphasis
194 st,no-lsfs-sc:
198 st,enable-hs-tx-staggering:
203 - if:
209 "#phy-cells":
213 "#phy-cells":
220 - reg
221 - phy-supply
222 - "#phy-cells"
227 - compatible
228 - reg
229 - clocks
230 - "#address-cells"
231 - "#size-cells"
232 - vdda1v1-supply
233 - vdda1v8-supply
234 - usb-phy@0
235 - usb-phy@1
240 - |
241 #include <dt-bindings/clock/stm32mp1-clks.h>
242 #include <dt-bindings/reset/stm32mp1-resets.h>
244 compatible = "st,stm32mp1-usbphyc";
248 vdda1v1-supply = <®11>;
249 vdda1v8-supply = <®18>;
250 #address-cells = <1>;
251 #size-cells = <0>;
252 #clock-cells = <0>;
254 usbphyc_port0: usb-phy@0 {
256 phy-supply = <&vdd_usb>;
257 #phy-cells = <0>;
258 st,tune-hs-dc-level = <2>;
259 st,enable-fs-rftime-tuning;
260 st,enable-hs-rftime-reduction;
261 st,trim-hs-current = <15>;
262 st,trim-hs-impedance = <1>;
263 st,tune-squelch-level = <3>;
264 st,tune-hs-rx-offset = <2>;
265 st,no-lsfs-sc;
267 compatible = "usb-a-connector";
268 vbus-supply = <&vbus_sw>;
272 usbphyc_port1: usb-phy@1 {
274 phy-supply = <&vdd_usb>;
275 #phy-cells = <1>;
276 st,tune-hs-dc-level = <2>;
277 st,enable-fs-rftime-tuning;
278 st,enable-hs-rftime-reduction;
279 st,trim-hs-current = <15>;
280 st,trim-hs-impedance = <1>;
281 st,tune-squelch-level = <3>;
282 st,tune-hs-rx-offset = <2>;
283 st,no-lsfs-sc;