Lines Matching +full:post +full:- +full:clocks

1 * APM X-Gene 15Gbps Multi-purpose PHY nodes
3 PHY nodes are defined to describe on-chip 15Gbps Multi-purpose PHY. Each
7 - compatible		: Shall be "apm,xgene-phy".
8 - reg			: PHY memory resource is the SDS PHY access resource.
9 - #phy-cells		: Shall be 1 as it expects one argument for setting
14 - status		: Shall be "ok" if enabled or "disabled" if disabled.
16 - clocks		: Reference to the clock entry.
17 - apm,tx-eye-tuning	: Manual control to fine tune the capture of the serial
19 			  Two set of 3-tuple setting for each (up to 3)
22 - apm,tx-eye-direction	: Eye tuning manual control direction. 0 means sample
25 			  Two set of 3-tuple setting for each (up to 3)
27 - apm,tx-boost-gain	: Frequency boost AC (LSB 3-bit) and DC (2-bit)
28 			  gain control. Two set of 3-tuple setting for each
31 - apm,tx-amplitude	: Amplitude control. Two set of 3-tuple setting for
35 - apm,tx-pre-cursor1	: 1st pre-cursor emphasis taps control. Two set of
36 			  3-tuple setting for each (up to 3) supported link
39 - apm,tx-pre-cursor2	: 2nd pre-cursor emphasis taps control. Two set of
40 			  3-tuple setting for each (up to 3) supported link
43 - apm,tx-post-cursor	: Post-cursor emphasis taps control. Two set of
44 			  3-tuple setting for Gen1, Gen2, and Gen3. Range is
46 - apm,tx-speed		: Tx operating speed. One set of 3-tuple for each
48 			   0 = 1-2Gbps
49 			   1 = 2-4Gbps (1st tuple default)
50 			   2 = 4-8Gbps
51 			   3 = 8-15Gbps (2nd tuple default)
52 			   4 = 2.5-4Gbps
53 			   5 = 4-5Gbps
54 			   6 = 5-6Gbps
55 			   7 = 6-16Gbps (3rd tuple default)
61 			compatible = "apm,xgene-phy";
63 			#phy-cells = <1>;
67 			compatible = "apm,xgene-phy";
69 			#phy-cells = <1>;
73 			compatible = "apm,xgene-phy";
75 			#phy-cells = <1>;