Lines Matching +full:phy +full:- +full:reset +full:- +full:gpios
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/allwinner,suniv-f1c100s-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner F1C100s USB PHY
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#phy-cells":
18 const: allwinner,suniv-f1c100s-usb-phy
22 description: PHY Control registers
24 reg-names:
29 description: USB OTG PHY bus clock
31 clock-names:
36 description: USB OTG reset
38 reset-names:
41 usb0_id_det-gpios:
45 usb0_vbus_det-gpios:
49 usb0_vbus_power-supply:
52 usb0_vbus-supply:
56 - "#phy-cells"
57 - compatible
58 - clocks
59 - clock-names
60 - reg
61 - reg-names
62 - resets
63 - reset-names
68 - |
69 #include <dt-bindings/gpio/gpio.h>
70 #include <dt-bindings/clock/suniv-ccu-f1c100s.h>
71 #include <dt-bindings/reset/suniv-ccu-f1c100s.h>
73 phy@1c13400 {
74 compatible = "allwinner,suniv-f1c100s-usb-phy";
76 reg-names = "phy_ctrl";
78 clock-names = "usb0_phy";
80 reset-names = "usb0_reset";
81 #phy-cells = <1>;
82 usb0_id_det-gpios = <&pio 4 2 GPIO_ACTIVE_HIGH>;