Lines Matching +full:pcie +full:- +full:phy1

3 PCIe DesignWare Controller
4  - compatible: Should be "ti,dra7-pcie" for RC (deprecated)
5 	       Should be "ti,dra7-pcie-ep" for EP (deprecated)
6 	       Should be "ti,dra746-pcie-rc" for dra74x/dra76 in RC mode
7 	       Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode
8 	       Should be "ti,dra726-pcie-rc" for dra72x in RC mode
9 	       Should be "ti,dra726-pcie-ep" for dra72x in EP mode
10  - phys : list of PHY specifiers (used by generic PHY framework)
11  - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
13  - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>",
14 	       where <X> is the instance number of the pcie from the HW spec.
15  - num-lanes as specified in ../snps,dw-pcie.yaml
16  - ti,syscon-lane-sel : phandle/offset pair. Phandle to the system control
22  - reg : Two register ranges as listed in the reg-names property
23  - reg-names : The first entry must be "ti-conf" for the TI-specific registers
24 	       The second entry must be "rc-dbics" for the DesignWare PCIe
26 	       The third entry must be "config" for the PCIe configuration space
27  - interrupts : Two interrupt entries must be specified. The first one is for
29  - #address-cells,
30    #size-cells,
31    #interrupt-cells,
34    interrupt-map-mask,
35    interrupt-map : as specified in ../snps,dw-pcie.yaml
36  - ti,syscon-unaligned-access: phandle to the syscon DT node. The 1st argument
44  - reg : Four register ranges as listed in the reg-names property
45  - reg-names : "ti-conf" for the TI-specific registers
51  - interrupts : one interrupt entries must be specified for main interrupt.
52  - num-ib-windows : number of inbound address translation windows
53  - num-ob-windows : number of outbound address translation windows
54  - ti,syscon-unaligned-access: phandle to the syscon DT node. The 1st argument
61  - gpios : Should be added if a GPIO line is required to drive PERST# line
71 	compatible = "simple-bus";
72 	#size-cells = <1>;
73 	#address-cells = <1>;
76 	pcie@51000000 {
77 		compatible = "ti,dra7-pcie";
79 		reg-names = "rc_dbics", "ti_conf", "config";
81 		#address-cells = <3>;
82 		#size-cells = <2>;
86 		#interrupt-cells = <1>;
87 		num-lanes = <1>;
90 		phy-names = "pcie-phy0";
91 		interrupt-map-mask = <0 0 0 7>;
92 		interrupt-map = <0 0 0 1 &pcie_intc 1>,
96 		pcie_intc: interrupt-controller {
97 			interrupt-controller;
98 			#address-cells = <0>;
99 			#interrupt-cells = <1>;