Lines Matching +full:num +full:- +full:lanes
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/sifive,fu740-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.
16 - Paul Walmsley <paul.walmsley@sifive.com>
17 - Greentime Hu <greentime.hu@sifive.com>
20 - $ref: /schemas/pci/snps,dw-pcie.yaml#
24 const: sifive,fu740-pcie
29 reg-names:
31 - const: dbi
32 - const: config
33 - const: mgmt
35 dma-coherent: true
37 num-lanes:
40 msi-parent: true
42 interrupt-names:
44 - const: msi
45 - const: inta
46 - const: intb
47 - const: intc
48 - const: intd
57 clock-names:
60 pwren-gpios:
64 reset-gpios:
68 - dma-coherent
69 - num-lanes
70 - interrupts
71 - interrupt-names
72 - interrupt-map-mask
73 - interrupt-map
74 - clocks
75 - clock-names
76 - resets
77 - pwren-gpios
78 - reset-gpios
83 - |
85 #address-cells = <2>;
86 #size-cells = <2>;
87 #include <dt-bindings/clock/sifive-fu740-prci.h>
90 compatible = "sifive,fu740-pcie";
91 #address-cells = <3>;
92 #size-cells = <2>;
93 #interrupt-cells = <1>;
97 reg-names = "dbi", "config", "mgmt";
99 dma-coherent;
100 bus-range = <0x0 0xff>;
105 num-lanes = <0x8>;
107 interrupt-names = "msi", "inta", "intb", "intc", "intd";
108 interrupt-parent = <&plic0>;
109 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
110 interrupt-map = <0x0 0x0 0x0 0x1 &plic0 57>,
114 clock-names = "pcie_aux";
117 pwren-gpios = <&gpio 5 0>;
118 reset-gpios = <&gpio 8 0>;