Lines Matching +full:r8a779f0 +full:- +full:pcie
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022-2023 Renesas Electronics Corp.
4 ---
5 $id: http://devicetree.org/schemas/pci/rcar-gen4-pci-ep.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas R-Car Gen4 PCIe Endpoint
11 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
14 - $ref: snps,dw-pcie-ep.yaml#
19 - enum:
20 - renesas,r8a779f0-pcie-ep # R-Car S4-8
21 - renesas,r8a779g0-pcie-ep # R-Car V4H
22 - renesas,r8a779h0-pcie-ep # R-Car V4M
23 - const: renesas,rcar-gen4-pcie-ep # R-Car Gen4
28 reg-names:
30 - const: dbi
31 - const: dbi2
32 - const: atu
33 - const: dma
34 - const: app
35 - const: phy
36 - const: addr_space
41 interrupt-names:
43 - const: dma
44 - const: sft_ce
45 - const: app
50 clock-names:
52 - const: core
53 - const: ref
55 power-domains:
61 reset-names:
63 - const: pwr
65 max-link-speed:
68 num-lanes:
71 max-functions:
75 - compatible
76 - reg
77 - reg-names
78 - interrupts
79 - interrupt-names
80 - clocks
81 - clock-names
82 - power-domains
83 - resets
84 - reset-names
89 - |
90 #include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
91 #include <dt-bindings/interrupt-controller/arm-gic.h>
92 #include <dt-bindings/power/r8a779f0-sysc.h>
95 #address-cells = <2>;
96 #size-cells = <2>;
98 pcie0_ep: pcie-ep@e65d0000 {
99 compatible = "renesas,r8a779f0-pcie-ep", "renesas,rcar-gen4-pcie-ep";
104 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "addr_space";
108 interrupt-names = "dma", "sft_ce", "app";
110 clock-names = "core", "ref";
111 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
113 reset-names = "pwr";
114 max-link-speed = <4>;
115 num-lanes = <2>;
116 max-functions = /bits/ 8 <2>;