Lines Matching +full:0 +full:x14180000
85 - const: p2u-0
123 0: C0
132 0 : C0
260 bus@0 {
263 ranges = <0x0 0x0 0x0 0x8 0x0>;
268 reg = <0x0 0x14180000 0x0 0x00020000>, /* appl registers (128K) */
269 <0x0 0x38000000 0x0 0x00040000>, /* configuration space (256K) */
270 <0x0 0x38040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
271 <0x0 0x38080000 0x0 0x00040000>; /* DBI reg space (256K) */
278 linux,pci-domain = <0>;
281 pinctrl-0 = <&pex_rst_c5_out_state>, <&clkreq_c5_bi_dir_state>;
295 interrupt-map-mask = <0 0 0 0>;
296 interrupt-map = <0 0 0 0 &gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
298 nvidia,bpmp = <&bpmp 0>;
305 bus-range = <0x0 0xff>;
306 … ranges = <0x81000000 0x0 0x38100000 0x0 0x38100000 0x0 0x00100000>, /* downstream I/O */
307 … <0x82000000 0x0 0x38200000 0x0 0x38200000 0x0 0x01e00000>, /* non-prefetch memory */
308 … <0xc2000000 0x18 0x00000000 0x18 0x00000000 0x4 0x00000000>; /* prefetchable memory */
316 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
326 bus@0 {
329 ranges = <0x0 0x0 0x0 0x8 0x0>;
334 reg = <0x00 0x14160000 0x0 0x00020000>, /* appl registers (128K) */
335 <0x00 0x36000000 0x0 0x00040000>, /* configuration space (256K) */
336 <0x00 0x36040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
337 <0x00 0x36080000 0x0 0x00040000>, /* DBI reg space (256K) */
338 <0x24 0x30000000 0x0 0x10000000>; /* ECAM (256MB) */
360 interrupt-map-mask = <0 0 0 0>;
361 interrupt-map = <0 0 0 0 &gic GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
369 bus-range = <0x0 0xff>;
370 ranges = <0x43000000 0x21 0x40000000 0x21 0x40000000 0x2 0xe8000000>, /* prefetchable */
371 … <0x02000000 0x0 0x40000000 0x24 0x28000000 0x0 0x08000000>, /* non-prefetchable */
372 … <0x01000000 0x0 0x36100000 0x00 0x36100000 0x0 0x00100000>; /* downstream I/O */
378 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";