Lines Matching +full:msi +full:- +full:map +full:- +full:mask
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jim Quinlan <james.quinlan@broadcom.com>
15 - enum:
16 - brcm,bcm2711-pcie # The Raspberry Pi 4
17 - brcm,bcm2712-pcie # Raspberry Pi 5
18 - brcm,bcm4908-pcie
19 - brcm,bcm7211-pcie # Broadcom STB version of RPi4
20 - brcm,bcm7216-pcie # Broadcom 7216 Arm
21 - brcm,bcm7278-pcie # Broadcom 7278 Arm
22 - brcm,bcm7425-pcie # Broadcom 7425 MIPs
23 - brcm,bcm7435-pcie # Broadcom 7435 MIPs
24 - brcm,bcm7445-pcie # Broadcom 7445 Arm
25 - brcm,bcm7712-pcie # Broadcom STB sibling of Rpi 5
33 - description: PCIe host controller
34 - description: builtin MSI controller
36 interrupt-names:
39 - const: pcie
40 - const: msi
46 dma-ranges:
53 clock-names:
55 - const: sw_pcie
57 msi-controller:
58 description: Identifies the node as an MSI controller.
60 msi-parent:
61 description: MSI controller the device is capable of using.
63 brcm,enable-ssc:
64 description: Indicates usage of spread-spectrum clocking.
67 aspm-no-l0s: true
69 brcm,clkreq-mode:
72 signal. There are three different modes -- "safe", which drives the
74 not provide any power savings; "no-l1ss" -- which provides Clock
78 potentially hanging the system; "default" -- which provides L0s, L1,
85 enum: [ safe, no-l1ss, default ]
87 brcm,scb-sizes:
93 may have two component regions -- base and extended -- so
94 this information cannot be deduced from the dma-ranges.
95 $ref: /schemas/types.yaml#/definitions/uint64-array
103 reset-names:
106 - enum: [perst, rescal]
107 - const: bridge
108 - const: swinit
111 - compatible
112 - reg
113 - ranges
114 - dma-ranges
115 - "#interrupt-cells"
116 - interrupts
117 - interrupt-names
118 - interrupt-map-mask
119 - interrupt-map
120 - msi-controller
123 - $ref: /schemas/pci/pci-host-bridge.yaml#
124 - $ref: /schemas/interrupt-controller/msi-controller.yaml#
125 - if:
129 const: brcm,bcm4908-pcie
135 reset-names:
137 - const: perst
140 - resets
141 - reset-names
142 - if:
146 const: brcm,bcm7216-pcie
152 reset-names:
154 - const: rescal
157 - resets
158 - reset-names
160 - if:
164 const: brcm,bcm7712-pcie
171 reset-names:
173 - const: rescal
174 - const: bridge
175 - const: swinit
178 - resets
179 - reset-names
184 - |
185 #include <dt-bindings/interrupt-controller/irq.h>
186 #include <dt-bindings/interrupt-controller/arm-gic.h>
189 #address-cells = <2>;
190 #size-cells = <1>;
192 compatible = "brcm,bcm2711-pcie";
195 #address-cells = <3>;
196 #size-cells = <2>;
197 #interrupt-cells = <1>;
200 interrupt-names = "pcie", "msi";
201 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
202 interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH
207 msi-parent = <&pcie0>;
208 msi-controller;
210 dma-ranges = <0x42000000 0x1 0x00000000 0x0 0x40000000 0x0 0x80000000>,
212 brcm,enable-ssc;
213 brcm,scb-sizes = <0x0000000080000000 0x0000000080000000>;
217 #address-cells = <3>;
218 #size-cells = <2>;
222 vpcie3v3-supply = <&vreg7>;
226 pci-ep@0,0 {
227 assigned-addresses =