Lines Matching +full:opp +full:- +full:microvolt +full:- +full:speed
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/opp/allwinner,sun50i-h6-operating-points.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner H6 CPU OPP
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
15 OPP varies based on the silicon variant in use. Allwinner Process
20 - $ref: opp-v2-base.yaml#
25 - allwinner,sun50i-h6-operating-points
26 - allwinner,sun50i-h616-operating-points
28 nvmem-cells:
30 A phandle pointing to a nvmem-cells node representing the efuse
33 to the nvmem-cells bindings in
37 opp-shared: true
40 - compatible
41 - nvmem-cells
44 "^opp-[0-9]+$":
48 opp-hz: true
49 clock-latency-ns: true
50 opp-microvolt: true
51 opp-supported-hw:
55 bit per speed bin index.
58 "^opp-microvolt-speed[0-9]$": true
61 - opp-hz
68 - |
69 cpu_opp_table: opp-table {
70 compatible = "allwinner,sun50i-h6-operating-points";
71 nvmem-cells = <&speedbin_efuse>;
72 opp-shared;
74 opp-480000000 {
75 clock-latency-ns = <244144>; /* 8 32k periods */
76 opp-hz = /bits/ 64 <480000000>;
78 opp-microvolt-speed0 = <880000>;
79 opp-microvolt-speed1 = <820000>;
80 opp-microvolt-speed2 = <800000>;
83 opp-1080000000 {
84 clock-latency-ns = <244144>; /* 8 32k periods */
85 opp-hz = /bits/ 64 <1080000000>;
87 opp-microvolt-speed0 = <1060000>;
88 opp-microvolt-speed1 = <880000>;
89 opp-microvolt-speed2 = <840000>;
92 opp-1488000000 {
93 clock-latency-ns = <244144>; /* 8 32k periods */
94 opp-hz = /bits/ 64 <1488000000>;
96 opp-microvolt-speed0 = <1160000>;
97 opp-microvolt-speed1 = <1000000>;
98 opp-microvolt-speed2 = <960000>;
102 - |
103 opp-table {
104 compatible = "allwinner,sun50i-h616-operating-points";
105 nvmem-cells = <&speedbin_efuse>;
106 opp-shared;
108 opp-480000000 {
109 clock-latency-ns = <244144>; /* 8 32k periods */
110 opp-hz = /bits/ 64 <480000000>;
112 opp-microvolt = <900000>;
113 opp-supported-hw = <0x1f>;
116 opp-792000000 {
117 clock-latency-ns = <244144>; /* 8 32k periods */
118 opp-hz = /bits/ 64 <792000000>;
120 opp-microvolt-speed1 = <900000>;
121 opp-microvolt-speed4 = <940000>;
122 opp-supported-hw = <0x12>;
125 opp-1512000000 {
126 clock-latency-ns = <244144>; /* 8 32k periods */
127 opp-hz = /bits/ 64 <1512000000>;
129 opp-microvolt = <1100000>;
130 opp-supported-hw = <0x0a>;