Lines Matching +full:msa +full:- +full:fixed +full:- +full:perm
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kalle Valo <kvalo@kernel.org>
11 - Jeff Johnson <jjohnson@kernel.org>
19 - qcom,ath10k # SDIO-based devices
20 - qcom,ipq4019-wifi
21 - qcom,wcn3990-wifi # SNoC-based devices
26 reg-names:
28 - const: membase
34 interrupt-names:
38 memory-region:
41 Reference to the MSA memory region used by the Wi-Fi firmware
52 clock-names:
59 reset-names:
61 - const: wifi_cpu_init
62 - const: wifi_radio_srif
63 - const: wifi_radio_warm
64 - const: wifi_radio_cold
65 - const: wifi_core_warm
66 - const: wifi_core_cold
68 ext-fem-name:
72 - microsemi-lx5586
73 - sky85703-11
74 - sky85803
76 firmware-name:
82 wifi-firmware:
86 The ath10k Wi-Fi node can contain one optional firmware subnode.
92 - iommus
94 ieee80211-freq-limit: true
96 qcom,ath10k-calibration-data:
97 $ref: /schemas/types.yaml#/definitions/uint8-array
99 Calibration data + board-specific data as a byte array. The length
102 qcom,ath10k-calibration-variant:
105 Unique variant identifier of the calibration data in board-2.bin
108 qcom,ath10k-pre-calibration-data:
109 $ref: /schemas/types.yaml#/definitions/uint8-array
111 Pre-calibration data as a byte array. The length can vary between
114 qcom,coexist-support:
120 qcom,coexist-gpio-pin:
123 COEX GPIO number provided to the Wi-Fi firmware.
125 qcom,msa-fixed-perm:
131 qcom,no-msa-ready-indicator:
136 qcom,smem-states:
137 $ref: /schemas/types.yaml#/definitions/phandle-array
140 - description: Signal bits used to enable/disable low power mode
143 qcom,smem-state-names:
146 - const: wlan-smp2p-out
148 qcom,snoc-host-cap-8bit-quirk:
154 qcom,xo-cal-data:
159 vdd-0.8-cx-mx-supply:
162 vdd-1.8-xo-supply:
165 vdd-1.3-rfa-supply:
168 vdd-3.3-ch0-supply:
169 description: Primary Wi-Fi antenna supply
171 vdd-3.3-ch1-supply:
172 description: Secondary Wi-Fi antenna supply
175 - compatible
176 - reg
181 - $ref: ieee80211.yaml#
182 - if:
187 - qcom,ipq4019-wifi
194 interrupt-names:
196 - const: msi0
197 - const: msi1
198 - const: msi2
199 - const: msi3
200 - const: msi4
201 - const: msi5
202 - const: msi6
203 - const: msi7
204 - const: msi8
205 - const: msi9
206 - const: msi10
207 - const: msi11
208 - const: msi12
209 - const: msi13
210 - const: msi14
211 - const: msi15
212 - const: legacy
216 - description: Wi-Fi command clock
217 - description: Wi-Fi reference clock
218 - description: Wi-Fi RTC clock
220 clock-names:
222 - const: wifi_wcss_cmd
223 - const: wifi_wcss_ref
224 - const: wifi_wcss_rtc
227 - clocks
228 - clock-names
229 - interrupts
230 - interrupt-names
231 - resets
232 - reset-names
234 - if:
239 - qcom,wcn3990-wifi
246 - description: XO reference clock
247 - description: Qualcomm Debug Subsystem clock
249 clock-names:
252 - const: cxo_ref_clk_pin
253 - const: qdss
257 - description: CE0
258 - description: CE1
259 - description: CE2
260 - description: CE3
261 - description: CE4
262 - description: CE5
263 - description: CE6
264 - description: CE7
265 - description: CE8
266 - description: CE9
267 - description: CE10
268 - description: CE11
270 interrupt-names: false
273 - interrupts
277 - |
278 #include <dt-bindings/clock/qcom,rpmcc.h>
279 #include <dt-bindings/interrupt-controller/arm-gic.h>
282 compatible = "qcom,wcn3990-wifi";
284 reg-names = "membase";
285 memory-region = <&wlan_msa_mem>;
287 clock-names = "cxo_ref_clk_pin";
302 qcom,snoc-host-cap-8bit-quirk;
303 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
304 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
305 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
306 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
307 vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
309 wifi-firmware {
315 - |
316 #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
319 compatible = "qcom,ipq4019-wifi";
327 reset-names = "wifi_cpu_init",
336 clock-names = "wifi_wcss_cmd",
356 interrupt-names = "msi0",
373 ieee80211-freq-limit = <5470000 5875000>;