Lines Matching +full:0 +full:xf007
19 The internal Communications Port Programming Interface (CPPI5) (Host port 0).
20 Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX channels
27 Support for Audio/Video Bridging (P802.1Qav/D6.0)
31 IEEE P902.3br/D2.0 Interspersing Express Traffic
113 const: 0
169 "^mdio@[0-9a-f]+$":
176 "^cpts@[0-9a-f]+":
252 reg = <0x0 0x46000000 0x0 0x200000>;
254 ranges = <0x0 0x0 0x0 0x46000000 0x0 0x200000>;
260 pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
262 dmas = <&mcu_udmap 0xf000>,
263 <&mcu_udmap 0xf001>,
264 <&mcu_udmap 0xf002>,
265 <&mcu_udmap 0xf003>,
266 <&mcu_udmap 0xf004>,
267 <&mcu_udmap 0xf005>,
268 <&mcu_udmap 0xf006>,
269 <&mcu_udmap 0xf007>,
270 <&mcu_udmap 0x7000>;
276 #size-cells = <0>;
282 ti,syscon-efuse = <&mcu_conf 0x200>;
292 reg = <0x0 0xf00 0x0 0x100>;
294 #size-cells = <0>;
299 phy0: ethernet-phy@0 {
300 reg = <0>;
309 reg = <0x0 0x3d000 0x0 0x400>;