Lines Matching +full:soc +full:- +full:glue

1 STMicroelectronics SoC DWMAC glue layer controller
5 and what is needed on STi platforms to program the stmmac glue logic.
10  - compatible	: "st,stih407-dwmac"
11  - st,syscon : Should be phandle/offset pair. The phandle to the syscon node which
12    encompases the glue register, and the offset of the control register.
13  - st,gmac_en: this is to enable the gmac into a dedicated sysctl control
14    register available on STiH407 SoC.
15  - pinctrl-0: pin-control for all the MII mode supported.
18  - resets : phandle pointing to the system reset controller with correct
20  - st,ext-phyclk: valid only for RMII where PHY can generate 50MHz clock or
22  - st,tx-retime-src: This specifies which clk is wired up to the mac for
26  - sti-ethclk: this is the phy clock.
27  - sti-clkconf: this is an extra sysconfig register, available in new SoCs,
29  - st,gmac_en: to enable the GMAC, this only is present in some SoCs; e.g.
36 	compatible = "st,stih407-dwmac", "snps,dwmac", "snps,dwmac-3.710";
38 	reg-names = "stmmaceth";
43 	reset-names = "stmmaceth";
48 	interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
51 	snps,mixed-burst;
53 	pinctrl-names = "default";
54 	pinctrl-0 = <&pinctrl_rgmii1>;
56 	clock-names = "stmmaceth", "sti-ethclk";