Lines Matching +full:sun8i +full:- +full:r40 +full:- +full:can
1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
27 - snps,dwmac-3.70a
28 - snps,dwmac-3.710
29 - snps,dwmac-3.72a
30 - snps,dwmac-4.00
31 - snps,dwmac-4.10a
32 - snps,dwmac-4.20a
33 - snps,dwmac-5.10a
34 - snps,dwmac-5.20
35 - snps,dwxgmac
36 - snps,dwxgmac-2.10
39 - st,spear600-gmac
42 - compatible
52 - allwinner,sun7i-a20-gmac
53 - allwinner,sun8i-a83t-emac
54 - allwinner,sun8i-h3-emac
55 - allwinner,sun8i-r40-gmac
56 - allwinner,sun8i-v3s-emac
57 - allwinner,sun50i-a64-emac
58 - amlogic,meson6-dwmac
59 - amlogic,meson8b-dwmac
60 - amlogic,meson8m2-dwmac
61 - amlogic,meson-gxbb-dwmac
62 - amlogic,meson-axg-dwmac
63 - ingenic,jz4775-mac
64 - ingenic,x1000-mac
65 - ingenic,x1600-mac
66 - ingenic,x1830-mac
67 - ingenic,x2000-mac
68 - loongson,ls2k-dwmac
69 - loongson,ls7a-dwmac
70 - qcom,qcs404-ethqos
71 - qcom,sa8775p-ethqos
72 - qcom,sc8280xp-ethqos
73 - qcom,sm8150-ethqos
74 - renesas,r9a06g032-gmac
75 - renesas,rzn1-gmac
76 - rockchip,px30-gmac
77 - rockchip,rk3128-gmac
78 - rockchip,rk3228-gmac
79 - rockchip,rk3288-gmac
80 - rockchip,rk3308-gmac
81 - rockchip,rk3328-gmac
82 - rockchip,rk3366-gmac
83 - rockchip,rk3368-gmac
84 - rockchip,rk3576-gmac
85 - rockchip,rk3588-gmac
86 - rockchip,rk3399-gmac
87 - rockchip,rv1108-gmac
88 - snps,dwmac
89 - snps,dwmac-3.40a
90 - snps,dwmac-3.50a
91 - snps,dwmac-3.610
92 - snps,dwmac-3.70a
93 - snps,dwmac-3.710
94 - snps,dwmac-3.72a
95 - snps,dwmac-4.00
96 - snps,dwmac-4.10a
97 - snps,dwmac-4.20a
98 - snps,dwmac-5.10a
99 - snps,dwmac-5.20
100 - snps,dwxgmac
101 - snps,dwxgmac-2.10
102 - starfive,jh7100-dwmac
103 - starfive,jh7110-dwmac
104 - thead,th1520-gmac
113 - description: Combined signal for various interrupt events
114 - description: The interrupt to manage the remote wake-up packet detection
115 - description: The interrupt that occurs when Rx exits the LPI state
116 - description: The interrupt that occurs when HW safety error triggered
118 interrupt-names:
121 - const: macirq
122 - enum: [eth_wake_irq, eth_lpi, sfty]
123 - enum: [eth_wake_irq, eth_lpi, sfty]
124 - enum: [eth_wake_irq, eth_lpi, sfty]
131 - description: GMAC main clock
132 - description: Peripheral registers interface clock
133 - description:
138 clock-names:
144 - stmmaceth
145 - pclk
146 - ptp_ref
151 - description: GMAC stmmaceth reset
152 - description: AHB reset
154 reset-names:
156 - items:
157 - enum: [stmmaceth, ahb]
158 - items:
159 - const: stmmaceth
160 - const: ahb
162 power-domains:
165 mac-mode:
166 $ref: ethernet-controller.yaml#/properties/phy-connection-type
168 The property is identical to 'phy-mode', and assumes that there is mode
169 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
170 can be passive (no SW requirement), and requires that the MAC operate
173 snps,axi-config:
176 AXI BUS Mode parameters. Phandle to a node that can contain the
184 * snps,fb, fixed-burst
185 * snps,mb, mixed-burst
188 snps,mtl-rx-config:
192 implements the 'rx-queues-config' object described in
195 rx-queues-config:
198 snps,rx-queues-to-use:
201 snps,rx-sched-sp:
204 snps,rx-sched-wsp:
208 - if:
210 - snps,rx-sched-sp
213 snps,rx-sched-wsp: false
214 - if:
216 - snps,rx-sched-wsp
219 snps,rx-sched-sp: false
221 "^queue[0-9]$":
225 snps,dcb-algorithm:
228 snps,avb-algorithm:
231 snps,map-to-dma-channel:
234 snps,route-avcp:
237 snps,route-ptp:
240 snps,route-dcbcp:
243 snps,route-up:
246 snps,route-multi-broad:
250 $ref: /schemas/types.yaml#/definitions/uint32-array
254 - if:
256 - snps,dcb-algorithm
259 snps,avb-algorithm: false
260 - if:
262 - snps,avb-algorithm
265 snps,dcb-algorithm: false
266 - if:
268 - snps,route-avcp
271 snps,route-ptp: false
272 snps,route-dcbcp: false
273 snps,route-up: false
274 snps,route-multi-broad: false
275 - if:
277 - snps,route-ptp
280 snps,route-avcp: false
281 snps,route-dcbcp: false
282 snps,route-up: false
283 snps,route-multi-broad: false
284 - if:
286 - snps,route-dcbcp
289 snps,route-avcp: false
290 snps,route-ptp: false
291 snps,route-up: false
292 snps,route-multi-broad: false
293 - if:
295 - snps,route-up
298 snps,route-avcp: false
299 snps,route-ptp: false
300 snps,route-dcbcp: false
301 snps,route-multi-broad: false
302 - if:
304 - snps,route-multi-broad
307 snps,route-avcp: false
308 snps,route-ptp: false
309 snps,route-dcbcp: false
310 snps,route-up: false
314 snps,mtl-tx-config:
318 implements the 'tx-queues-config' object described in
321 tx-queues-config:
324 snps,tx-queues-to-use:
327 snps,tx-sched-wrr:
330 snps,tx-sched-wfq:
333 snps,tx-sched-dwrr:
337 - if:
339 - snps,tx-sched-wrr
342 snps,tx-sched-wfq: false
343 snps,tx-sched-dwrr: false
344 - if:
346 - snps,tx-sched-wfq
349 snps,tx-sched-wrr: false
350 snps,tx-sched-dwrr: false
351 - if:
353 - snps,tx-sched-dwrr
356 snps,tx-sched-wrr: false
357 snps,tx-sched-wfq: false
359 "^queue[0-9]$":
366 snps,dcb-algorithm:
369 snps,avb-algorithm:
388 $ref: /schemas/types.yaml#/definitions/uint32-array
396 snps,coe-unsupported:
401 - if:
403 - snps,dcb-algorithm
406 snps,avb-algorithm: false
407 - if:
409 - snps,avb-algorithm
412 snps,dcb-algorithm: false
417 snps,reset-gpio:
423 snps,reset-active-low:
429 snps,reset-delays-us:
432 Triplet of delays. The 1st cell is reset pre-delay in micro
434 cell is reset post-delay in micro seconds.
441 Use Address-Aligned Beats
463 snps,no-pbl-x8:
469 snps,fixed-burst:
474 snps,mixed-burst:
490 snps,en-tx-lpi-clockgating:
493 Enable gating of the MAC TX clock during TX low-power mode
495 snps,multicast-filter-bins:
501 snps,perfect-filter-entries:
507 snps,ps-speed:
510 Port selection speed that can be passed to the core when PCS
514 snps,clk-csr:
533 const: snps,dwmac-mdio
536 - compatible
538 stmmac-axi-config:
571 $ref: /schemas/types.yaml#/definitions/uint32-array
580 fixed-burst
585 mixed-burst
593 - compatible
594 - reg
595 - interrupts
596 - interrupt-names
597 - phy-mode
600 snps,reset-active-low: ["snps,reset-gpio"]
601 snps,reset-delays-us: ["snps,reset-gpio"]
604 - $ref: ethernet-controller.yaml#
605 - if:
611 - allwinner,sun7i-a20-gmac
612 - allwinner,sun8i-a83t-emac
613 - allwinner,sun8i-h3-emac
614 - allwinner,sun8i-r40-gmac
615 - allwinner,sun8i-v3s-emac
616 - allwinner,sun50i-a64-emac
617 - loongson,ls2k-dwmac
618 - loongson,ls7a-dwmac
619 - ingenic,jz4775-mac
620 - ingenic,x1000-mac
621 - ingenic,x1600-mac
622 - ingenic,x1830-mac
623 - ingenic,x2000-mac
624 - qcom,qcs404-ethqos
625 - qcom,sa8775p-ethqos
626 - qcom,sc8280xp-ethqos
627 - qcom,sm8150-ethqos
628 - snps,dwmac-4.00
629 - snps,dwmac-4.10a
630 - snps,dwmac-4.20a
631 - snps,dwmac-5.10a
632 - snps,dwmac-5.20
633 - snps,dwxgmac
634 - snps,dwxgmac-2.10
635 - st,spear600-gmac
644 - |
646 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
648 interrupt-parent = <&vic1>;
650 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
651 mac-address = [000000000000]; /* Filled in by U-Boot */
652 max-frame-size = <3800>;
653 phy-mode = "gmii";
654 snps,multicast-filter-bins = <256>;
655 snps,perfect-filter-entries = <128>;
656 rx-fifo-depth = <16384>;
657 tx-fifo-depth = <16384>;
659 clock-names = "stmmaceth";
660 snps,axi-config = <&stmmac_axi_setup>;
661 snps,mtl-rx-config = <&mtl_rx_setup>;
662 snps,mtl-tx-config = <&mtl_tx_setup>;
664 stmmac_axi_setup: stmmac-axi-config {
670 mtl_rx_setup: rx-queues-config {
671 snps,rx-queues-to-use = <1>;
672 snps,rx-sched-sp;
674 snps,dcb-algorithm;
675 snps,map-to-dma-channel = <0x0>;
680 mtl_tx_setup: tx-queues-config {
681 snps,tx-queues-to-use = <2>;
682 snps,tx-sched-wrr;
685 snps,dcb-algorithm;
690 snps,avb-algorithm;
700 #address-cells = <1>;
701 #size-cells = <0>;
702 compatible = "snps,dwmac-mdio";
703 phy1: ethernet-phy@0 {