Lines Matching +full:pre +full:- +full:multiply
1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
27 - snps,dwmac-3.70a
28 - snps,dwmac-3.710
29 - snps,dwmac-3.72a
30 - snps,dwmac-4.00
31 - snps,dwmac-4.10a
32 - snps,dwmac-4.20a
33 - snps,dwmac-5.00a
34 - snps,dwmac-5.10a
35 - snps,dwmac-5.20
36 - snps,dwmac-5.30a
37 - snps,dwxgmac
38 - snps,dwxgmac-2.10
41 - st,spear600-gmac
44 - compatible
54 - allwinner,sun7i-a20-gmac
55 - allwinner,sun8i-a83t-emac
56 - allwinner,sun8i-h3-emac
57 - allwinner,sun8i-r40-gmac
58 - allwinner,sun8i-v3s-emac
59 - allwinner,sun50i-a64-emac
60 - amlogic,meson6-dwmac
61 - amlogic,meson8b-dwmac
62 - amlogic,meson8m2-dwmac
63 - amlogic,meson-gxbb-dwmac
64 - amlogic,meson-axg-dwmac
65 - ingenic,jz4775-mac
66 - ingenic,x1000-mac
67 - ingenic,x1600-mac
68 - ingenic,x1830-mac
69 - ingenic,x2000-mac
70 - loongson,ls2k-dwmac
71 - loongson,ls7a-dwmac
72 - nxp,s32g2-dwmac
73 - qcom,qcs404-ethqos
74 - qcom,sa8775p-ethqos
75 - qcom,sc8280xp-ethqos
76 - qcom,sm8150-ethqos
77 - renesas,r9a06g032-gmac
78 - renesas,rzn1-gmac
79 - renesas,rzv2h-gbeth
80 - rockchip,px30-gmac
81 - rockchip,rk3128-gmac
82 - rockchip,rk3228-gmac
83 - rockchip,rk3288-gmac
84 - rockchip,rk3308-gmac
85 - rockchip,rk3328-gmac
86 - rockchip,rk3366-gmac
87 - rockchip,rk3368-gmac
88 - rockchip,rk3576-gmac
89 - rockchip,rk3588-gmac
90 - rockchip,rk3399-gmac
91 - rockchip,rv1108-gmac
92 - snps,dwmac
93 - snps,dwmac-3.40a
94 - snps,dwmac-3.50a
95 - snps,dwmac-3.610
96 - snps,dwmac-3.70a
97 - snps,dwmac-3.710
98 - snps,dwmac-3.72a
99 - snps,dwmac-4.00
100 - snps,dwmac-4.10a
101 - snps,dwmac-4.20a
102 - snps,dwmac-5.00a
103 - snps,dwmac-5.10a
104 - snps,dwmac-5.20
105 - snps,dwmac-5.30a
106 - snps,dwxgmac
107 - snps,dwxgmac-2.10
108 - sophgo,sg2042-dwmac
109 - sophgo,sg2044-dwmac
110 - starfive,jh7100-dwmac
111 - starfive,jh7110-dwmac
112 - tesla,fsd-ethqos
113 - thead,th1520-gmac
123 interrupt-names:
128 - description: Combined signal for various interrupt events
130 - description: The interrupt to manage the remote wake-up packet detection
132 - description: The interrupt that occurs when Rx exits the LPI state
134 - description: The interrupt that occurs when HW safety error triggered
136 - description: Per channel receive completion interrupt
137 pattern: '^rx-queue-[0-3]$'
138 - description: Per channel transmit completion interrupt
139 pattern: '^tx-queue-[0-3]$'
146 - description: GMAC main clock
147 - description: Peripheral registers interface clock
148 - description:
153 clock-names:
159 - stmmaceth
160 - pclk
161 - ptp_ref
166 - description: GMAC stmmaceth reset
167 - description: AHB reset
169 reset-names:
171 - items:
172 - enum: [stmmaceth, ahb]
173 - items:
174 - const: stmmaceth
175 - const: ahb
177 power-domains:
180 mac-mode:
181 $ref: ethernet-controller.yaml#/properties/phy-connection-type
183 The property is identical to 'phy-mode', and assumes that there is mode
184 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
188 snps,axi-config:
199 * snps,fb, fixed-burst
200 * snps,mb, mixed-burst
203 snps,mtl-rx-config:
207 implements the 'rx-queues-config' object described in
210 rx-queues-config:
213 snps,rx-queues-to-use:
216 snps,rx-sched-sp:
219 snps,rx-sched-wsp:
223 - if:
225 - snps,rx-sched-sp
228 snps,rx-sched-wsp: false
229 - if:
231 - snps,rx-sched-wsp
234 snps,rx-sched-sp: false
236 "^queue[0-9]$":
240 snps,dcb-algorithm:
243 snps,avb-algorithm:
246 snps,map-to-dma-channel:
249 snps,route-avcp:
252 snps,route-ptp:
255 snps,route-dcbcp:
258 snps,route-up:
261 snps,route-multi-broad:
265 $ref: /schemas/types.yaml#/definitions/uint32-array
269 - if:
271 - snps,dcb-algorithm
274 snps,avb-algorithm: false
275 - if:
277 - snps,avb-algorithm
280 snps,dcb-algorithm: false
281 - if:
283 - snps,route-avcp
286 snps,route-ptp: false
287 snps,route-dcbcp: false
288 snps,route-up: false
289 snps,route-multi-broad: false
290 - if:
292 - snps,route-ptp
295 snps,route-avcp: false
296 snps,route-dcbcp: false
297 snps,route-up: false
298 snps,route-multi-broad: false
299 - if:
301 - snps,route-dcbcp
304 snps,route-avcp: false
305 snps,route-ptp: false
306 snps,route-up: false
307 snps,route-multi-broad: false
308 - if:
310 - snps,route-up
313 snps,route-avcp: false
314 snps,route-ptp: false
315 snps,route-dcbcp: false
316 snps,route-multi-broad: false
317 - if:
319 - snps,route-multi-broad
322 snps,route-avcp: false
323 snps,route-ptp: false
324 snps,route-dcbcp: false
325 snps,route-up: false
329 snps,mtl-tx-config:
333 implements the 'tx-queues-config' object described in
336 tx-queues-config:
339 snps,tx-queues-to-use:
342 snps,tx-sched-wrr:
345 snps,tx-sched-wfq:
348 snps,tx-sched-dwrr:
352 - if:
354 - snps,tx-sched-wrr
357 snps,tx-sched-wfq: false
358 snps,tx-sched-dwrr: false
359 - if:
361 - snps,tx-sched-wfq
364 snps,tx-sched-wrr: false
365 snps,tx-sched-dwrr: false
366 - if:
368 - snps,tx-sched-dwrr
371 snps,tx-sched-wrr: false
372 snps,tx-sched-wfq: false
374 "^queue[0-9]$":
381 snps,dcb-algorithm:
384 snps,avb-algorithm:
403 $ref: /schemas/types.yaml#/definitions/uint32-array
411 snps,coe-unsupported:
416 - if:
418 - snps,dcb-algorithm
421 snps,avb-algorithm: false
422 - if:
424 - snps,avb-algorithm
427 snps,dcb-algorithm: false
432 snps,reset-gpio:
438 snps,reset-active-low:
444 snps,reset-delays-us:
447 Triplet of delays. The 1st cell is reset pre-delay in micro
449 cell is reset post-delay in micro seconds.
456 Use Address-Aligned Beats
478 snps,no-pbl-x8:
481 Don\'t multiply the pbl/txpbl/rxpbl values by 8. For core
482 rev < 3.50, don\'t multiply the values by 4.
484 snps,fixed-burst:
489 snps,mixed-burst:
505 snps,en-tx-lpi-clockgating:
509 Enable gating of the MAC TX clock during TX low-power mode
511 snps,multicast-filter-bins:
517 snps,perfect-filter-entries:
523 snps,ps-speed:
530 snps,clk-csr:
549 const: snps,dwmac-mdio
552 - compatible
554 stmmac-axi-config:
587 $ref: /schemas/types.yaml#/definitions/uint32-array
596 fixed-burst
601 mixed-burst
609 - compatible
610 - reg
611 - interrupts
612 - interrupt-names
613 - phy-mode
616 snps,reset-active-low: ["snps,reset-gpio"]
617 snps,reset-delays-us: ["snps,reset-gpio"]
620 - $ref: ethernet-controller.yaml#
621 - if:
627 - allwinner,sun7i-a20-gmac
628 - allwinner,sun8i-a83t-emac
629 - allwinner,sun8i-h3-emac
630 - allwinner,sun8i-r40-gmac
631 - allwinner,sun8i-v3s-emac
632 - allwinner,sun50i-a64-emac
633 - loongson,ls2k-dwmac
634 - loongson,ls7a-dwmac
635 - ingenic,jz4775-mac
636 - ingenic,x1000-mac
637 - ingenic,x1600-mac
638 - ingenic,x1830-mac
639 - ingenic,x2000-mac
640 - qcom,qcs404-ethqos
641 - qcom,sa8775p-ethqos
642 - qcom,sc8280xp-ethqos
643 - qcom,sm8150-ethqos
644 - snps,dwmac-4.00
645 - snps,dwmac-4.10a
646 - snps,dwmac-4.20a
647 - snps,dwmac-5.00a
648 - snps,dwmac-5.10a
649 - snps,dwmac-5.20
650 - snps,dwmac-5.30a
651 - snps,dwxgmac
652 - snps,dwxgmac-2.10
653 - st,spear600-gmac
662 - |
664 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
666 interrupt-parent = <&vic1>;
668 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
669 mac-address = [000000000000]; /* Filled in by U-Boot */
670 max-frame-size = <3800>;
671 phy-mode = "gmii";
672 snps,multicast-filter-bins = <256>;
673 snps,perfect-filter-entries = <128>;
674 rx-fifo-depth = <16384>;
675 tx-fifo-depth = <16384>;
677 clock-names = "stmmaceth";
678 snps,axi-config = <&stmmac_axi_setup>;
679 snps,mtl-rx-config = <&mtl_rx_setup>;
680 snps,mtl-tx-config = <&mtl_tx_setup>;
682 stmmac_axi_setup: stmmac-axi-config {
688 mtl_rx_setup: rx-queues-config {
689 snps,rx-queues-to-use = <1>;
690 snps,rx-sched-sp;
692 snps,dcb-algorithm;
693 snps,map-to-dma-channel = <0x0>;
698 mtl_tx_setup: tx-queues-config {
699 snps,tx-queues-to-use = <2>;
700 snps,tx-sched-wrr;
703 snps,dcb-algorithm;
708 snps,avb-algorithm;
718 #address-cells = <1>;
719 #size-cells = <0>;
720 compatible = "snps,dwmac-mdio";
721 phy1: ethernet-phy@0 {