Lines Matching +full:combined +full:- +full:power +full:- +full:req
1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
27 - snps,dwmac-3.70a
28 - snps,dwmac-3.710
29 - snps,dwmac-4.00
30 - snps,dwmac-4.10a
31 - snps,dwmac-4.20a
32 - snps,dwmac-5.10a
33 - snps,dwmac-5.20
34 - snps,dwxgmac
35 - snps,dwxgmac-2.10
38 - st,spear600-gmac
41 - compatible
51 - allwinner,sun7i-a20-gmac
52 - allwinner,sun8i-a83t-emac
53 - allwinner,sun8i-h3-emac
54 - allwinner,sun8i-r40-gmac
55 - allwinner,sun8i-v3s-emac
56 - allwinner,sun50i-a64-emac
57 - amlogic,meson6-dwmac
58 - amlogic,meson8b-dwmac
59 - amlogic,meson8m2-dwmac
60 - amlogic,meson-gxbb-dwmac
61 - amlogic,meson-axg-dwmac
62 - ingenic,jz4775-mac
63 - ingenic,x1000-mac
64 - ingenic,x1600-mac
65 - ingenic,x1830-mac
66 - ingenic,x2000-mac
67 - loongson,ls2k-dwmac
68 - loongson,ls7a-dwmac
69 - qcom,qcs404-ethqos
70 - qcom,sa8775p-ethqos
71 - qcom,sc8280xp-ethqos
72 - qcom,sm8150-ethqos
73 - renesas,r9a06g032-gmac
74 - renesas,rzn1-gmac
75 - rockchip,px30-gmac
76 - rockchip,rk3128-gmac
77 - rockchip,rk3228-gmac
78 - rockchip,rk3288-gmac
79 - rockchip,rk3308-gmac
80 - rockchip,rk3328-gmac
81 - rockchip,rk3366-gmac
82 - rockchip,rk3368-gmac
83 - rockchip,rk3576-gmac
84 - rockchip,rk3588-gmac
85 - rockchip,rk3399-gmac
86 - rockchip,rv1108-gmac
87 - snps,dwmac
88 - snps,dwmac-3.40a
89 - snps,dwmac-3.50a
90 - snps,dwmac-3.610
91 - snps,dwmac-3.70a
92 - snps,dwmac-3.710
93 - snps,dwmac-4.00
94 - snps,dwmac-4.10a
95 - snps,dwmac-4.20a
96 - snps,dwmac-5.10a
97 - snps,dwmac-5.20
98 - snps,dwxgmac
99 - snps,dwxgmac-2.10
100 - starfive,jh7100-dwmac
101 - starfive,jh7110-dwmac
110 - description: Combined signal for various interrupt events
111 - description: The interrupt to manage the remote wake-up packet detection
112 - description: The interrupt that occurs when Rx exits the LPI state
113 - description: The interrupt that occurs when HW safety error triggered
115 interrupt-names:
118 - const: macirq
119 - enum: [eth_wake_irq, eth_lpi, sfty]
120 - enum: [eth_wake_irq, eth_lpi, sfty]
121 - enum: [eth_wake_irq, eth_lpi, sfty]
128 - description: GMAC main clock
129 - description: Peripheral registers interface clock
130 - description:
135 clock-names:
141 - stmmaceth
142 - pclk
143 - ptp_ref
148 - description: GMAC stmmaceth reset
149 - description: AHB reset
151 reset-names:
153 - items:
154 - enum: [stmmaceth, ahb]
155 - items:
156 - const: stmmaceth
157 - const: ahb
159 power-domains:
162 mac-mode:
163 $ref: ethernet-controller.yaml#/properties/phy-connection-type
165 The property is identical to 'phy-mode', and assumes that there is mode
166 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
170 snps,axi-config:
175 * snps,lpi_en, enable Low Power Interface
177 * snps,wr_osr_lmt, max write outstanding req. limit
178 * snps,rd_osr_lmt, max read outstanding req. limit
181 * snps,fb, fixed-burst
182 * snps,mb, mixed-burst
185 snps,mtl-rx-config:
189 implements the 'rx-queues-config' object described in
192 rx-queues-config:
195 snps,rx-queues-to-use:
198 snps,rx-sched-sp:
201 snps,rx-sched-wsp:
205 - if:
207 - snps,rx-sched-sp
210 snps,rx-sched-wsp: false
211 - if:
213 - snps,rx-sched-wsp
216 snps,rx-sched-sp: false
218 "^queue[0-9]$":
222 snps,dcb-algorithm:
225 snps,avb-algorithm:
228 snps,map-to-dma-channel:
231 snps,route-avcp:
234 snps,route-ptp:
237 snps,route-dcbcp:
240 snps,route-up:
243 snps,route-multi-broad:
247 $ref: /schemas/types.yaml#/definitions/uint32-array
251 - if:
253 - snps,dcb-algorithm
256 snps,avb-algorithm: false
257 - if:
259 - snps,avb-algorithm
262 snps,dcb-algorithm: false
263 - if:
265 - snps,route-avcp
268 snps,route-ptp: false
269 snps,route-dcbcp: false
270 snps,route-up: false
271 snps,route-multi-broad: false
272 - if:
274 - snps,route-ptp
277 snps,route-avcp: false
278 snps,route-dcbcp: false
279 snps,route-up: false
280 snps,route-multi-broad: false
281 - if:
283 - snps,route-dcbcp
286 snps,route-avcp: false
287 snps,route-ptp: false
288 snps,route-up: false
289 snps,route-multi-broad: false
290 - if:
292 - snps,route-up
295 snps,route-avcp: false
296 snps,route-ptp: false
297 snps,route-dcbcp: false
298 snps,route-multi-broad: false
299 - if:
301 - snps,route-multi-broad
304 snps,route-avcp: false
305 snps,route-ptp: false
306 snps,route-dcbcp: false
307 snps,route-up: false
311 snps,mtl-tx-config:
315 implements the 'tx-queues-config' object described in
318 tx-queues-config:
321 snps,tx-queues-to-use:
324 snps,tx-sched-wrr:
327 snps,tx-sched-wfq:
330 snps,tx-sched-dwrr:
334 - if:
336 - snps,tx-sched-wrr
339 snps,tx-sched-wfq: false
340 snps,tx-sched-dwrr: false
341 - if:
343 - snps,tx-sched-wfq
346 snps,tx-sched-wrr: false
347 snps,tx-sched-dwrr: false
348 - if:
350 - snps,tx-sched-dwrr
353 snps,tx-sched-wrr: false
354 snps,tx-sched-wfq: false
356 "^queue[0-9]$":
363 snps,dcb-algorithm:
366 snps,avb-algorithm:
374 description: enable Low Power Interface
380 description: max write outstanding req. limit
383 description: max read outstanding req. limit
385 $ref: /schemas/types.yaml#/definitions/uint32-array
393 snps,coe-unsupported:
398 - if:
400 - snps,dcb-algorithm
403 snps,avb-algorithm: false
404 - if:
406 - snps,avb-algorithm
409 snps,dcb-algorithm: false
414 snps,reset-gpio:
420 snps,reset-active-low:
426 snps,reset-delays-us:
429 Triplet of delays. The 1st cell is reset pre-delay in micro
431 cell is reset post-delay in micro seconds.
438 Use Address-Aligned Beats
460 snps,no-pbl-x8:
466 snps,fixed-burst:
471 snps,mixed-burst:
487 snps,en-tx-lpi-clockgating:
490 Enable gating of the MAC TX clock during TX low-power mode
492 snps,multicast-filter-bins:
498 snps,perfect-filter-entries:
504 snps,ps-speed:
511 snps,clk-csr:
530 const: snps,dwmac-mdio
533 - compatible
535 stmmac-axi-config:
545 enable Low Power Interface
555 max write outstanding req. limit
560 max read outstanding req. limit
568 $ref: /schemas/types.yaml#/definitions/uint32-array
577 fixed-burst
582 mixed-burst
590 - compatible
591 - reg
592 - interrupts
593 - interrupt-names
594 - phy-mode
597 snps,reset-active-low: ["snps,reset-gpio"]
598 snps,reset-delays-us: ["snps,reset-gpio"]
601 - $ref: ethernet-controller.yaml#
602 - if:
608 - allwinner,sun7i-a20-gmac
609 - allwinner,sun8i-a83t-emac
610 - allwinner,sun8i-h3-emac
611 - allwinner,sun8i-r40-gmac
612 - allwinner,sun8i-v3s-emac
613 - allwinner,sun50i-a64-emac
614 - loongson,ls2k-dwmac
615 - loongson,ls7a-dwmac
616 - ingenic,jz4775-mac
617 - ingenic,x1000-mac
618 - ingenic,x1600-mac
619 - ingenic,x1830-mac
620 - ingenic,x2000-mac
621 - qcom,qcs404-ethqos
622 - qcom,sa8775p-ethqos
623 - qcom,sc8280xp-ethqos
624 - qcom,sm8150-ethqos
625 - snps,dwmac-4.00
626 - snps,dwmac-4.10a
627 - snps,dwmac-4.20a
628 - snps,dwmac-5.10a
629 - snps,dwmac-5.20
630 - snps,dwxgmac
631 - snps,dwxgmac-2.10
632 - st,spear600-gmac
641 - |
643 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
645 interrupt-parent = <&vic1>;
647 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
648 mac-address = [000000000000]; /* Filled in by U-Boot */
649 max-frame-size = <3800>;
650 phy-mode = "gmii";
651 snps,multicast-filter-bins = <256>;
652 snps,perfect-filter-entries = <128>;
653 rx-fifo-depth = <16384>;
654 tx-fifo-depth = <16384>;
656 clock-names = "stmmaceth";
657 snps,axi-config = <&stmmac_axi_setup>;
658 snps,mtl-rx-config = <&mtl_rx_setup>;
659 snps,mtl-tx-config = <&mtl_tx_setup>;
661 stmmac_axi_setup: stmmac-axi-config {
667 mtl_rx_setup: rx-queues-config {
668 snps,rx-queues-to-use = <1>;
669 snps,rx-sched-sp;
671 snps,dcb-algorithm;
672 snps,map-to-dma-channel = <0x0>;
677 mtl_tx_setup: tx-queues-config {
678 snps,tx-queues-to-use = <2>;
679 snps,tx-sched-wrr;
682 snps,dcb-algorithm;
687 snps,avb-algorithm;
697 #address-cells = <1>;
698 #size-cells = <0>;
699 compatible = "snps,dwmac-mdio";
700 phy1: ethernet-phy@0 {