Lines Matching +full:tx +full:- +full:clk +full:- +full:delay +full:- +full:ps
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
18 - ingenic,jz4775-mac
19 - ingenic,x1000-mac
20 - ingenic,x1600-mac
21 - ingenic,x1830-mac
22 - ingenic,x2000-mac
30 interrupt-names:
36 clock-names:
39 mode-reg:
41 description: An extra syscon register that control ethernet interface and timing delay
43 rx-clk-delay-ps:
44 description: RGMII receive clock delay defined in pico seconds
46 tx-clk-delay-ps:
47 description: RGMII transmit clock delay defined in pico seconds
50 - compatible
51 - reg
52 - interrupts
53 - interrupt-names
54 - clocks
55 - clock-names
56 - mode-reg
61 - |
62 #include <dt-bindings/clock/ingenic,x1000-cgu.h>
65 compatible = "ingenic,x1000-mac";
68 interrupt-parent = <&intc>;
70 interrupt-names = "macirq";
73 clock-names = "stmmaceth";
75 mode-reg = <&mac_phy_ctrl>;