Lines Matching +full:rx +full:- +full:internal +full:- +full:delay +full:- +full:ps
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
19 max-speed:
24 nvmem-cells:
29 nvmem-cell-names:
30 const: mac-address
32 phy-connection-type:
40 - internal
41 - mii
42 - gmii
43 - sgmii
44 - psgmii
45 - qsgmii
46 - qusgmii
47 - tbi
48 - rev-mii
49 - rmii
50 - rev-rmii
51 - moca
53 # RX and TX delays are provided by the PCB. See below
54 - rgmii
56 # RX and TX delays are not provided by the PCB. This is the most
58 - rgmii-id
60 # TX delay is provided by the PCB. See below
61 - rgmii-rxid
63 # RX delay is provided by the PCB. See below
64 - rgmii-txid
65 - rtbi
66 - smii
67 - xgmii
68 - trgmii
69 - 1000base-x
70 - 2500base-x
71 - 5gbase-r
72 - rxaui
73 - xaui
75 # 10GBASE-KR, XFI, SFI
76 - 10gbase-kr
77 - usxgmii
78 - 10gbase-r
79 - 25gbase-r
80 - 10g-qxgmii
82 phy-mode:
83 $ref: "#/properties/phy-connection-type"
85 pcs-handle:
86 $ref: /schemas/types.yaml#/definitions/phandle-array
91 bus to link with an external PHY (phy-handle) if exists.
93 pcs-handle-names:
95 The name of each PCS in pcs-handle.
97 phy-handle:
103 $ref: "#/properties/phy-handle"
106 phy-device:
107 $ref: "#/properties/phy-handle"
110 rx-fifo-depth:
123 tx-fifo-depth:
131 Specifies the PHY management type. If auto is set and fixed-link
136 - auto
137 - in-band-status
139 fixed-link:
141 - $ref: /schemas/types.yaml#/definitions/uint32-array
144 - minimum: 0
148 specified fixed-links
150 - enum: [0, 1]
155 - enum: [10, 100, 1000, 2500, 10000]
159 - enum: [0, 1]
163 - enum: [0, 1]
167 - type: object
176 full-duplex:
179 Indicates that full-duplex is used. When absent, half
187 asym-pause:
192 link-gpios:
198 - speed
210 '#address-cells':
213 '#size-cells':
217 '^led@[a-f0-9]+$':
229 - reg
236 pcs-handle-names: [pcs-handle]
239 - $ref: /schemas/net/network-class.yaml#
240 - if:
242 phy-mode:
245 - rgmii
246 - rgmii-rxid
247 - rgmii-txid
248 - rgmii-id
251 rx-internal-delay-ps:
253 RGMII Receive Clock Delay defined in pico seconds. This is used for
254 controllers that have configurable RX internal delays. If this
255 property is present then the MAC applies the RX delay.
256 tx-internal-delay-ps:
258 RGMII Transmit Clock Delay defined in pico seconds. This is used for
259 controllers that have configurable TX internal delays. If this
260 property is present then the MAC applies the TX delay.
267 # 'phy-modes' & 'phy-connection-type' properties 'rgmii', 'rgmii-id',
268 # 'rgmii-rxid', and 'rgmii-txid' are frequently used wrongly by
271 # The RGMII specification requires a 2ns delay between the data and
272 # clock signals on the RGMII bus. How this delay is implemented is not
277 # delay. If both the RX and TX delays are implemented in this manner,
281 # 'rgmii-id' should be used. Here, 'id' refers to 'internal delay',
282 # where either the MAC or PHY adds the delay.
285 # lines, either 'rgmii-rxid' or 'rgmii-txid' should be used,
287 # internally, while the PCB implements the other delay.
294 # any RGMII phy mode other than 'rgmii-id' is probably wrong, and is
311 # to read the 'phy-mode' from Device Tree, not implement any delays,
313 # specified by the 'phy-mode'. The PHY should always be reconfigured
324 # delays which cannot be disabled. The 'phy-mode' only describes the
326 # the meaning of 'phy-mode'. It does however mean that a 'phy-mode' of
330 # cannot be supported. When the MAC implements the delay, it must
331 # ensure that the PHY does not also implement the same delay. So it
332 # must modify the phy-mode it passes to the PHY, removing the delay it
333 # has added. Failure to remove the delay will result in a
334 # non-functioning link.
338 # properties 'rx-internal-delay-ps' and 'tx-internal-delay-ps' should
340 # expected here are small. A value of 2000ps, i.e 2ns, and a phy-mode
344 # 'rx-internal-delay-ps' and 'tx-internal-delay-ps' in the PHY node
345 # should be used. When the PHY is implementing delays, e.g. 'rgmii-id'
346 # these properties should have a value near to 2000ps. If the PCB is
348 # tune the delay added by the PCB.