Lines Matching +full:reset +full:- +full:gpio
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Landen Chao <Landen.Chao@mediatek.com>
12 - DENG Qingfang <dqfext@gmail.com>
13 - Sean Wang <sean.wang@mediatek.com>
14 - Daniel Golle <daniel@makrotopia.org>
17 There are three versions of MT7530, standalone, in a multi-chip module and
18 built-into a SoC.
20 MT7530 is a part of the multi-chip module in MT7620AN, MT7620DA, MT7620DAN,
23 The MT7988 SoC comes with a built-in switch similar to MT7531 as well as four
26 CPU port and 4 user ports connected to the built-in Gigabit Ethernet PHYs.
36 - Port 5 can be used as a CPU port.
38 - PHY 0 or 4 of the switch can be muxed to gmac5 of the switch. Therefore,
43 The driver looks up the reg on the ethernet-phy node, which the phy-handle
46 The driver requires the gmac of the SoC to have "mediatek,eth-mac" as the
48 MediaTek SoC can benefit this. Banana Pi BPI-R2 suits this.
54 - For the multi-chip module MT7530, in case of an external phy wired to
63 - Port 5 can be wired to an external phy. Port 5 becomes a DSA user port.
65 For the multi-chip module MT7530, the external phy must be wired TX to TX
69 For the multi-chip module MT7530, muxing PHY 0 or 4 won't work when the
72 For the MT7621 SoCs, rgmii2 group must be claimed with gpio function.
79 - description:
80 Standalone MT7530 and multi-chip module MT7530 in MT7623AI SoC
83 - description:
87 - description:
88 Multi-chip module MT7530 in MT7621AT, MT7621DAT and MT7621ST SoCs
91 - description:
92 Built-in switch of the MT7988 SoC
93 const: mediatek,mt7988-switch
95 - description:
96 Built-in switch of the Airoha EN7581 SoC
97 const: airoha,en7581-switch
99 - description:
100 Built-in switch of the Airoha AN7583 SoC
101 const: airoha,an7583-switch
106 core-supply:
110 "#gpio-cells":
113 gpio-controller:
116 If defined, LED controller of the MT7530 switch will run on GPIO mode.
119 port 0 LED 0..2 as GPIO 0..2
120 port 1 LED 0..2 as GPIO 3..5
121 port 2 LED 0..2 as GPIO 6..8
122 port 3 LED 0..2 as GPIO 9..11
123 port 4 LED 0..2 as GPIO 12..14
125 "#interrupt-cells":
128 interrupt-controller: true
133 io-supply:
136 See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt for
153 switch is a part of the multi-chip module.
155 reset-gpios:
157 GPIO to reset the switch. Use this if mediatek,mcm is not used.
158 This property is optional because some boards share the reset line with
160 reset line is used.
163 reset-names:
168 Phandle pointing to the system reset controller with line index for the
173 "^(ethernet-)?ports$":
178 "^(ethernet-)?port@[0-6]$":
189 - if:
195 - 5
196 - 6
199 - compatible
200 - reg
203 builtin-dsa-port:
205 "^(ethernet-)?ports$":
207 "^(ethernet-)?port@[0-6]$":
212 phy-mode:
215 mt7530-dsa-port:
217 "^(ethernet-)?ports$":
219 "^(ethernet-)?port@[0-6]$":
229 phy-mode:
231 - gmii
232 - mii
233 - rgmii
236 phy-mode:
238 - rgmii
239 - trgmii
241 mt7531-dsa-port:
243 "^(ethernet-)?ports$":
245 "^(ethernet-)?port@[0-6]$":
255 phy-mode:
257 - 1000base-x
258 - 2500base-x
259 - rgmii
260 - sgmii
263 phy-mode:
265 - 1000base-x
266 - 2500base-x
267 - sgmii
270 - $ref: dsa.yaml#/$defs/ethernet-ports
271 - if:
273 - mediatek,mcm
276 reset-gpios: false
279 - resets
280 - reset-names
282 - dependencies:
283 interrupt-controller: [ interrupts ]
285 - if:
290 $ref: "#/$defs/mt7530-dsa-port"
292 - core-supply
293 - io-supply
295 - if:
300 $ref: "#/$defs/mt7531-dsa-port"
302 gpio-controller: false
305 - if:
310 $ref: "#/$defs/mt7530-dsa-port"
312 - mediatek,mcm
314 - if:
318 - mediatek,mt7988-switch
319 - airoha,en7581-switch
320 - airoha,an7583-switch
322 $ref: "#/$defs/builtin-dsa-port"
324 gpio-controller: false
326 reset-names: false
332 - |
333 #include <dt-bindings/gpio/gpio.h>
336 #address-cells = <1>;
337 #size-cells = <0>;
343 reset-gpios = <&pio 33 0>;
345 core-supply = <&mt6323_vpa_reg>;
346 io-supply = <&mt6323_vemc3v3_reg>;
348 ethernet-ports {
349 #address-cells = <1>;
350 #size-cells = <0>;
380 phy-mode = "rgmii";
382 fixed-link {
384 full-duplex;
393 - |
394 #include <dt-bindings/reset/mt2701-resets.h>
397 #address-cells = <1>;
398 #size-cells = <0>;
406 reset-names = "mcm";
408 core-supply = <&mt6323_vpa_reg>;
409 io-supply = <&mt6323_vemc3v3_reg>;
411 ethernet-ports {
412 #address-cells = <1>;
413 #size-cells = <0>;
443 phy-mode = "trgmii";
445 fixed-link {
447 full-duplex;
456 - |
457 #include <dt-bindings/gpio/gpio.h>
458 #include <dt-bindings/interrupt-controller/irq.h>
461 #address-cells = <1>;
462 #size-cells = <0>;
468 reset-gpios = <&pio 54 0>;
470 interrupt-controller;
471 #interrupt-cells = <1>;
472 interrupt-parent = <&pio>;
475 ethernet-ports {
476 #address-cells = <1>;
477 #size-cells = <0>;
507 phy-mode = "2500base-x";
509 fixed-link {
511 full-duplex;
520 - |
521 #include <dt-bindings/interrupt-controller/mips-gic.h>
522 #include <dt-bindings/reset/mt7621-reset.h>
525 #address-cells = <1>;
526 #size-cells = <0>;
534 reset-names = "mcm";
536 interrupt-controller;
537 #interrupt-cells = <1>;
538 interrupt-parent = <&gic>;
541 ethernet-ports {
542 #address-cells = <1>;
543 #size-cells = <0>;
573 phy-mode = "trgmii";
575 fixed-link {
577 full-duplex;
586 - |
587 #include <dt-bindings/interrupt-controller/mips-gic.h>
588 #include <dt-bindings/reset/mt7621-reset.h>
591 #address-cells = <1>;
592 #size-cells = <0>;
594 pinctrl-names = "default";
595 pinctrl-0 = <&rgmii2_pins>;
598 compatible = "mediatek,eth-mac";
601 phy-mode = "rgmii";
602 phy-handle = <&example5_ethphy4>;
606 #address-cells = <1>;
607 #size-cells = <0>;
610 example5_ethphy4: ethernet-phy@4 {
620 reset-names = "mcm";
622 interrupt-controller;
623 #interrupt-cells = <1>;
624 interrupt-parent = <&gic>;
627 ethernet-ports {
628 #address-cells = <1>;
629 #size-cells = <0>;
661 phy-mode = "trgmii";
663 fixed-link {
665 full-duplex;
675 - |
676 #include <dt-bindings/interrupt-controller/mips-gic.h>
677 #include <dt-bindings/reset/mt7621-reset.h>
680 #address-cells = <1>;
681 #size-cells = <0>;
683 pinctrl-names = "default";
684 pinctrl-0 = <&rgmii2_pins>;
687 compatible = "mediatek,eth-mac";
690 phy-mode = "rgmii";
691 phy-handle = <&example6_ethphy7>;
695 #address-cells = <1>;
696 #size-cells = <0>;
699 example6_ethphy7: ethernet-phy@7 {
701 phy-mode = "rgmii";
710 reset-names = "mcm";
712 interrupt-controller;
713 #interrupt-cells = <1>;
714 interrupt-parent = <&gic>;
717 ethernet-ports {
718 #address-cells = <1>;
719 #size-cells = <0>;
749 phy-mode = "trgmii";
751 fixed-link {
753 full-duplex;
763 - |
764 #include <dt-bindings/interrupt-controller/mips-gic.h>
765 #include <dt-bindings/reset/mt7621-reset.h>
768 #address-cells = <1>;
769 #size-cells = <0>;
771 pinctrl-names = "default";
772 pinctrl-0 = <&rgmii2_pins>;
775 #address-cells = <1>;
776 #size-cells = <0>;
779 example7_ethphy7: ethernet-phy@7 {
781 phy-mode = "rgmii";
790 reset-names = "mcm";
792 interrupt-controller;
793 #interrupt-cells = <1>;
794 interrupt-parent = <&gic>;
797 ethernet-ports {
798 #address-cells = <1>;
799 #size-cells = <0>;
829 phy-mode = "rgmii-txid";
830 phy-handle = <&example7_ethphy7>;
836 phy-mode = "trgmii";
838 fixed-link {
840 full-duplex;