Lines Matching +full:reg +full:- +full:io +full:- +full:width
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfgang Grandegger <wg@grandegger.com>
15 - enum:
16 - nxp,sja1000
17 - technologic,sja1000
18 - items:
19 - enum:
20 - renesas,r9a06g032-sja1000 # RZ/N1D
21 - renesas,r9a06g033-sja1000 # RZ/N1S
22 - const: renesas,rzn1-sja1000 # RZ/N1
24 reg:
33 power-domains:
36 reg-io-width:
37 description: I/O register width (in bytes) implemented by this device
41 nxp,external-clock-frequency:
48 nxp,tx-output-mode:
54 <0> : bi-phase output mode
59 nxp,tx-output-config:
66 <0x02> : TX0 pull-down (default)
67 <0x04> : TX0 pull-up
68 <0x06> : TX0 push-pull
70 <0x10> : TX1 pull-down
71 <0x20> : TX1 pull-up
72 <0x30> : TX1 push-pull
74 nxp,clock-out-frequency:
81 nxp,no-comparator-bypass:
86 - compatible
87 - reg
88 - interrupts
91 - $ref: can-controller.yaml#
92 - if:
97 - technologic,sja1000
98 - renesas,rzn1-sja1000
101 - reg-io-width
102 - if:
106 const: renesas,rzn1-sja1000
109 - clocks
110 - power-domains
115 - |
118 reg = <0x1a000 0x100>;
120 reg-io-width = <2>;
121 nxp,tx-output-config = <0x06>;
122 nxp,external-clock-frequency = <24000000>;
125 - |
126 #include <dt-bindings/interrupt-controller/arm-gic.h>
127 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
130 compatible = "renesas,r9a06g032-sja1000", "renesas,rzn1-sja1000";
131 reg = <0x52104000 0x800>;
132 reg-io-width = <4>;
135 power-domains = <&sysctrl>;