Lines Matching +full:mac +full:- +full:base
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/airoha,en7581-eth.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Bianconi <lorenzo@kernel.org>
14 These SoCs have multi-GMAC ports.
19 - airoha,en7581-eth
23 - description: Frame engine base address
24 - description: QDMA0 base address
25 - description: QDMA1 base address
27 reg-names:
29 - const: fe
30 - const: qdma0
31 - const: qdma1
35 - description: QDMA lan irq0
36 - description: QDMA lan irq1
37 - description: QDMA lan irq2
38 - description: QDMA lan irq3
39 - description: QDMA wan irq0
40 - description: QDMA wan irq1
41 - description: QDMA wan irq2
42 - description: QDMA wan irq3
43 - description: FE error irq
44 - description: PDMA irq
49 reset-names:
51 - const: fe
52 - const: pdma
53 - const: qdma
54 - const: xsi-mac
55 - const: hsi0-mac
56 - const: hsi1-mac
57 - const: hsi-mac
58 - const: xfp-mac
60 memory-region:
62 - description: QDMA0 buffer memory
63 - description: QDMA1 buffer memory
65 memory-region-names:
67 - const: qdma0-buf
68 - const: qdma1-buf
70 "#address-cells":
73 "#size-cells":
85 "^ethernet@[1-4]$":
88 $ref: ethernet-controller.yaml#
90 Ethernet GMAC port associated to the MAC controller
93 const: airoha,eth-mac
101 - reg
102 - compatible
105 - compatible
106 - reg
107 - interrupts
108 - resets
109 - reset-names
114 - |
115 #include <dt-bindings/interrupt-controller/arm-gic.h>
116 #include <dt-bindings/interrupt-controller/irq.h>
117 #include <dt-bindings/clock/en7523-clk.h>
120 #address-cells = <2>;
121 #size-cells = <2>;
124 compatible = "airoha,en7581-eth";
128 reg-names = "fe", "qdma0", "qdma1";
138 reset-names = "fe", "pdma", "qdma", "xsi-mac",
139 "hsi0-mac", "hsi1-mac", "hsi-mac",
140 "xfp-mac";
153 memory-region = <&qdma0_buf>, <&qdma1_buf>;
154 memory-region-names = "qdma0-buf", "qdma1-buf";
158 #address-cells = <1>;
159 #size-cells = <0>;
161 mac: ethernet@1 {
162 compatible = "airoha,eth-mac";