Lines Matching +full:gpio +full:- +full:width

1 GPIO assisted NAND flash
3 The GPIO assisted NAND flash uses a memory mapped interface to
4 read/write the NAND commands and data and GPIO pins for the control
8 - compatible : "gpio-control-nand"
9 - reg : should specify localbus chip select and size used for the chip.  The
12 - #address-cells, #size-cells : Must be present if the device has sub-nodes
14 - gpios : Specifies the GPIO pins to control the NAND device.  The order of
15   GPIO references is:  RDY, nCE, ALE, CLE, and nWP. nCE and nWP are optional.
18 - bank-width : Width (in bytes) of the device.  If not present, the width
20 - chip-delay : chip dependent delay for transferring data from array to
22 - gpio-control-nand,io-sync-reg : A 64-bit physical address for a read
24   the GPIO's and the NAND flash data bus.  If present, then after changing
25   GPIO state and before and after command byte writes, this register will be
26   read to ensure that the GPIO accesses have completed.
28 The device tree may optionally contain sub-nodes describing partitions of the
33 gpio-nand@1,0 {
34 	compatible = "gpio-control-nand";
36 	#address-cells = <1>;
37 	#size-cells = <1>;