Lines Matching +full:required +full:- +full:opps
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDHCI controller (sdhci-msm)
10 - Bjorn Andersson <andersson@kernel.org>
11 - Konrad Dybcio <konradybcio@kernel.org>
20 - enum:
21 - qcom,sdhci-msm-v4
23 - items:
24 - enum:
25 - qcom,apq8084-sdhci
26 - qcom,ipq4019-sdhci
27 - qcom,ipq8074-sdhci
28 - qcom,msm8226-sdhci
29 - qcom,msm8953-sdhci
30 - qcom,msm8974-sdhci
31 - qcom,msm8976-sdhci
32 - qcom,msm8916-sdhci
33 - qcom,msm8992-sdhci
34 - qcom,msm8994-sdhci
35 - qcom,msm8996-sdhci
36 - qcom,msm8998-sdhci
37 - const: qcom,sdhci-msm-v4 # for sdcc versions less than 5.0
38 - items:
39 - enum:
40 - qcom,ipq5018-sdhci
41 - qcom,ipq5332-sdhci
42 - qcom,ipq5424-sdhci
43 - qcom,ipq6018-sdhci
44 - qcom,ipq9574-sdhci
45 - qcom,milos-sdhci
46 - qcom,qcm2290-sdhci
47 - qcom,qcs404-sdhci
48 - qcom,qcs615-sdhci
49 - qcom,qcs8300-sdhci
50 - qcom,qdu1000-sdhci
51 - qcom,sar2130p-sdhci
52 - qcom,sc7180-sdhci
53 - qcom,sc7280-sdhci
54 - qcom,sc8280xp-sdhci
55 - qcom,sdm630-sdhci
56 - qcom,sdm670-sdhci
57 - qcom,sdm845-sdhci
58 - qcom,sdx55-sdhci
59 - qcom,sdx65-sdhci
60 - qcom,sdx75-sdhci
61 - qcom,sm6115-sdhci
62 - qcom,sm6125-sdhci
63 - qcom,sm6350-sdhci
64 - qcom,sm6375-sdhci
65 - qcom,sm7150-sdhci
66 - qcom,sm8150-sdhci
67 - qcom,sm8250-sdhci
68 - qcom,sm8350-sdhci
69 - qcom,sm8450-sdhci
70 - qcom,sm8550-sdhci
71 - qcom,sm8650-sdhci
72 - qcom,x1e80100-sdhci
73 - const: qcom,sdhci-msm-v5 # for sdcc version 5.0
79 reg-names:
86 - description: Main peripheral bus clock, PCLK/HCLK - AHB Bus clock
87 - description: SDC MMC clock, MCLK
88 - description: TCXO clock
89 - description: clock for Inline Crypto Engine
90 - description: SDCC bus voter clock
91 - description: reference clock for RCLK delay calibration
92 - description: sleep clock for RCLK delay calibration
94 clock-names:
97 - const: iface
98 - const: core
99 - const: xo
100 - enum: [ice, bus, cal, sleep]
101 - enum: [ice, bus, cal, sleep]
102 - enum: [ice, bus, cal, sleep]
103 - enum: [ice, bus, cal, sleep]
105 dma-coherent: true
110 interrupt-names:
112 - const: hc_irq
113 - const: pwr_irq
115 pinctrl-names:
118 - const: default
119 - const: sleep
121 pinctrl-0:
125 pinctrl-1:
132 qcom,ddr-config:
136 qcom,dll-config:
149 - description: data path, sdhc to ddr
150 - description: config path, cpu to sdhc
152 interconnect-names:
155 - const: sdhc-ddr
156 - const: cpu-sdhc
158 power-domains:
162 operating-points-v2: true
165 '^opp-table(-[a-z0-9]+)?$':
169 const: operating-points-v2
172 '^opp-?[0-9]+$':
173 required:
174 - required-opps
176 required:
177 - compatible
178 - reg
179 - clocks
180 - clock-names
181 - interrupts
184 - $ref: sdhci-common.yaml#
186 - if:
191 - qcom,sdhci-msm-v4
197 - description: Host controller register map
198 - description: SD Core register map
199 - description: CQE register map
200 - description: Inline Crypto Engine register map
201 reg-names:
204 - const: hc
205 - const: core
206 - const: cqhci
207 - const: ice
213 - description: Host controller register map
214 - description: CQE register map
215 - description: Inline Crypto Engine register map
216 reg-names:
219 - const: hc
220 - const: cqhci
221 - const: ice
226 - |
227 #include <dt-bindings/interrupt-controller/arm-gic.h>
228 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
229 #include <dt-bindings/clock/qcom,rpmh.h>
230 #include <dt-bindings/power/qcom,rpmhpd.h>
233 compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5";
238 interrupt-names = "hc_irq", "pwr_irq";
243 clock-names = "iface", "core", "xo";
245 qcom,dll-config = <0x0007642c>;
246 qcom,ddr-config = <0x80040868>;
247 power-domains = <&rpmhpd RPMHPD_CX>;
249 operating-points-v2 = <&sdhc2_opp_table>;
251 sdhc2_opp_table: opp-table {
252 compatible = "operating-points-v2";
254 opp-19200000 {
255 opp-hz = /bits/ 64 <19200000>;
256 required-opps = <&rpmhpd_opp_min_svs>;
259 opp-50000000 {
260 opp-hz = /bits/ 64 <50000000>;
261 required-opps = <&rpmhpd_opp_low_svs>;
264 opp-100000000 {
265 opp-hz = /bits/ 64 <100000000>;
266 required-opps = <&rpmhpd_opp_svs>;
269 opp-202000000 {
270 opp-hz = /bits/ 64 <202000000>;
271 required-opps = <&rpmhpd_opp_svs_l1>;