Lines Matching +full:sgpio +full:- +full:port +full:- +full:ranges
1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ocelot Externally-Controlled Ethernet Switch
10 - Colin Foster <colin.foster@in-advantage.com>
18 The switch family is a multi-port networking switch that supports many
25 - mscc,vsc7512
30 "#address-cells":
33 "#size-cells":
36 spi-max-frequency:
40 "^pinctrl@[0-9a-f]+$":
42 $ref: /schemas/pinctrl/mscc,ocelot-pinctrl.yaml
44 "^gpio@[0-9a-f]+$":
46 $ref: /schemas/pinctrl/microchip,sparx5-sgpio.yaml
50 - mscc,ocelot-sgpio
52 "^mdio@[0-9a-f]+$":
58 - mscc,ocelot-miim
60 "^ethernet-switch@[0-9a-f]+$":
62 $ref: /schemas/net/mscc,vsc7514-switch.yaml
67 - mscc,vsc7512-switch
70 - compatible
71 - reg
72 - '#address-cells'
73 - '#size-cells'
78 - |
79 ocelot_clock: ocelot-clock {
80 compatible = "fixed-clock";
81 #clock-cells = <0>;
82 clock-frequency = <125000000>;
86 #address-cells = <1>;
87 #size-cells = <0>;
91 spi-max-frequency = <2500000>;
93 #address-cells = <1>;
94 #size-cells = <1>;
97 compatible = "mscc,ocelot-miim";
98 #address-cells = <1>;
99 #size-cells = <0>;
102 sw_phy0: ethernet-phy@0 {
108 compatible = "mscc,ocelot-miim";
109 pinctrl-names = "default";
110 pinctrl-0 = <&miim1_pins>;
111 #address-cells = <1>;
112 #size-cells = <0>;
115 sw_phy4: ethernet-phy@4 {
121 compatible = "mscc,ocelot-pinctrl";
122 gpio-controller;
123 #gpio-cells = <2>;
124 gpio-ranges = <&gpio 0 0 22>;
127 sgpio_pins: sgpio-pins {
132 miim1_pins: miim1-pins {
139 compatible = "mscc,ocelot-sgpio";
140 #address-cells = <1>;
141 #size-cells = <0>;
142 bus-frequency = <12500000>;
144 microchip,sgpio-port-ranges = <0 15>;
145 pinctrl-names = "default";
146 pinctrl-0 = <&sgpio_pins>;
150 compatible = "microchip,sparx5-sgpio-bank";
152 gpio-controller;
153 #gpio-cells = <3>;
158 compatible = "microchip,sparx5-sgpio-bank";
160 gpio-controller;
161 #gpio-cells = <3>;