Lines Matching +full:memory +full:- +full:region
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32mp25-omm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STM32 Octo Memory Manager (OMM)
10 - Patrice Chotard <patrice.chotard@foss.st.com>
13 The STM32 Octo Memory Manager is a low-level interface that enables an
17 - Two single/dual/quad/octal SPI interfaces
18 - Two ports for pin assignment
22 const: st,stm32mp25-omm
24 "#address-cells":
27 "#size-cells":
32 Reflects the memory layout per OSPI instance.
34 <chip-select> 0 <registers base address> <size>
40 - description: OMM registers
41 - description: OMM memory map area
43 reg-names:
45 - const: regs
46 - const: memory_map
48 memory-region:
50 Memory region shared between the 2 OCTOSPI instance.
51 One or two phandle to a node describing a memory mapped region
56 memory-region-names:
58 Identify to which OSPI instance the memory region belongs to.
67 clock-names:
69 - const: omm
70 - const: ospi1
71 - const: ospi2
76 reset-names:
78 - const: omm
79 - const: ospi1
80 - const: ospi2
82 access-controllers:
85 power-domains:
88 st,syscfg-amcr:
89 $ref: /schemas/types.yaml#/definitions/phandle-array
92 memory map area shared between the 2 OSPI instance. The Octo Memory
93 Manager sets the AMCR depending of the memory-region configuration.
94 The memory split bitmask description is:
95 - 000: OCTOSPI1 (256 Mbytes), OCTOSPI2 unmapped
96 - 001: OCTOSPI1 (192 Mbytes), OCTOSPI2 (64 Mbytes)
97 - 010: OCTOSPI1 (128 Mbytes), OCTOSPI2 (128 Mbytes)
98 - 011: OCTOSPI1 (64 Mbytes), OCTOSPI2 (192 Mbytes)
99 - 1xx: OCTOSPI1 unmapped, OCTOSPI2 (256 Mbytes)
101 - items:
102 - description: phandle to syscfg
103 - description: register offset within syscfg
104 - description: register bitmask for memory split
106 st,omm-req2ack-ns:
112 st,omm-cssel-ovr:
116 - 0: OCTOSPI1 chip select send to NCS1 OCTOSPI2 chip select send to NCS1
117 - 1: OCTOSPI1 chip select send to NCS2 OCTOSPI2 chip select send to NCS1
118 - 2: OCTOSPI1 chip select send to NCS1 OCTOSPI2 chip select send to NCS2
119 - 3: OCTOSPI1 chip select send to NCS2 OCTOSPI2 chip select send to NCS2
124 st,omm-mux:
128 - 0: direct mode
129 - 1: mux OCTOSPI1 and OCTOSPI2 to port 1
130 - 2: swapped mode
131 - 3: mux OCTOSPI1 and OCTOSPI2 to port 2
137 ^spi@[0-9]:
139 $ref: /schemas/spi/st,stm32mp25-ospi.yaml#
143 - compatible
144 - reg
145 - "#address-cells"
146 - "#size-cells"
147 - clocks
148 - clock-names
149 - resets
150 - reset-names
151 - st,syscfg-amcr
152 - ranges
157 - |
158 #include <dt-bindings/clock/st,stm32mp25-rcc.h>
159 #include <dt-bindings/interrupt-controller/arm-gic.h>
160 #include <dt-bindings/reset/st,stm32mp25-rcc.h>
162 compatible = "st,stm32mp25-omm";
164 reg-names = "regs", "memory_map";
167 memory-region = <&mm_ospi1>, <&mm_ospi2>;
168 memory-region-names = "ospi1", "ospi2";
169 pinctrl-0 = <&ospi_port1_clk_pins_a
172 pinctrl-1 = <&ospi_port1_clk_sleep_pins_a
175 pinctrl-names = "default", "sleep";
179 clock-names = "omm", "ospi1", "ospi2";
183 reset-names = "omm", "ospi1", "ospi2";
184 access-controllers = <&rifsc 111>;
185 power-domains = <&CLUSTER_PD>;
186 #address-cells = <2>;
187 #size-cells = <1>;
188 st,syscfg-amcr = <&syscfg 0x2c00 0x7>;
189 st,omm-req2ack-ns = <0>;
190 st,omm-mux = <0>;
191 st,omm-cssel-ovr = <0>;
194 compatible = "st,stm32mp25-ospi";
196 memory-region = <&mm_ospi1>;
200 dma-names = "tx", "rx";
203 access-controllers = <&rifsc 74>;
204 power-domains = <&CLUSTER_PD>;
205 #address-cells = <1>;
206 #size-cells = <0>;
207 st,syscfg-dlyb = <&syscfg 0x1000>;
211 compatible = "st,stm32mp25-ospi";
213 memory-region = <&mm_ospi1>;
217 dma-names = "tx", "rx";
220 access-controllers = <&rifsc 75>;
221 power-domains = <&CLUSTER_PD>;
222 #address-cells = <1>;
223 #size-cells = <0>;
224 st,syscfg-dlyb = <&syscfg 0x1000>;