Lines Matching +full:0 +full:x07070004
33 const: 0
51 "^emc-timings-[0-9]+$":
62 "^timing-[0-9]+$":
93 minimum: 0
156 minimum: 0
356 reg = <0x70019000 0x1000>;
369 reg = <0x7001b000 0x1000>;
377 #interconnect-cells = <0>;
379 emc-timings-0 {
382 timing-0 {
385 nvidia,emc-auto-cal-config = <0xa1430000>;
386 nvidia,emc-auto-cal-config2 = <0x00000000>;
387 nvidia,emc-auto-cal-config3 = <0x00000000>;
388 nvidia,emc-auto-cal-interval = <0x001fffff>;
389 nvidia,emc-bgbias-ctl0 = <0x00000008>;
390 nvidia,emc-cfg = <0x73240000>;
391 nvidia,emc-cfg-2 = <0x000008c5>;
392 nvidia,emc-ctt-term-ctrl = <0x00000802>;
393 nvidia,emc-mode-1 = <0x80100003>;
394 nvidia,emc-mode-2 = <0x80200008>;
395 nvidia,emc-mode-4 = <0x00000000>;
396 nvidia,emc-mode-reset = <0x80001221>;
397 nvidia,emc-mrs-wait-cnt = <0x000e000e>;
398 nvidia,emc-sel-dpd-ctrl = <0x00040128>;
399 nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
400 nvidia,emc-zcal-cnt-long = <0x00000042>;
401 nvidia,emc-zcal-interval = <0x00000000>;
404 0x00000000 /* EMC_RC */
405 0x00000003 /* EMC_RFC */
406 0x00000000 /* EMC_RFC_SLR */
407 0x00000000 /* EMC_RAS */
408 0x00000000 /* EMC_RP */
409 0x00000004 /* EMC_R2W */
410 0x0000000a /* EMC_W2R */
411 0x00000003 /* EMC_R2P */
412 0x0000000b /* EMC_W2P */
413 0x00000000 /* EMC_RD_RCD */
414 0x00000000 /* EMC_WR_RCD */
415 0x00000003 /* EMC_RRD */
416 0x00000003 /* EMC_REXT */
417 0x00000000 /* EMC_WEXT */
418 0x00000006 /* EMC_WDV */
419 0x00000006 /* EMC_WDV_MASK */
420 0x00000006 /* EMC_QUSE */
421 0x00000002 /* EMC_QUSE_WIDTH */
422 0x00000000 /* EMC_IBDLY */
423 0x00000005 /* EMC_EINPUT */
424 0x00000005 /* EMC_EINPUT_DURATION */
425 0x00010000 /* EMC_PUTERM_EXTRA */
426 0x00000003 /* EMC_PUTERM_WIDTH */
427 0x00000000 /* EMC_PUTERM_ADJ */
428 0x00000000 /* EMC_CDB_CNTL_1 */
429 0x00000000 /* EMC_CDB_CNTL_2 */
430 0x00000000 /* EMC_CDB_CNTL_3 */
431 0x00000004 /* EMC_QRST */
432 0x0000000c /* EMC_QSAFE */
433 0x0000000d /* EMC_RDV */
434 0x0000000f /* EMC_RDV_MASK */
435 0x00000060 /* EMC_REFRESH */
436 0x00000000 /* EMC_BURST_REFRESH_NUM */
437 0x00000018 /* EMC_PRE_REFRESH_REQ_CNT */
438 0x00000002 /* EMC_PDEX2WR */
439 0x00000002 /* EMC_PDEX2RD */
440 0x00000001 /* EMC_PCHG2PDEN */
441 0x00000000 /* EMC_ACT2PDEN */
442 0x00000007 /* EMC_AR2PDEN */
443 0x0000000f /* EMC_RW2PDEN */
444 0x00000005 /* EMC_TXSR */
445 0x00000005 /* EMC_TXSRDLL */
446 0x00000004 /* EMC_TCKE */
447 0x00000005 /* EMC_TCKESR */
448 0x00000004 /* EMC_TPD */
449 0x00000000 /* EMC_TFAW */
450 0x00000000 /* EMC_TRPAB */
451 0x00000005 /* EMC_TCLKSTABLE */
452 0x00000005 /* EMC_TCLKSTOP */
453 0x00000064 /* EMC_TREFBW */
454 0x00000000 /* EMC_FBIO_CFG6 */
455 0x00000000 /* EMC_ODT_WRITE */
456 0x00000000 /* EMC_ODT_READ */
457 0x106aa298 /* EMC_FBIO_CFG5 */
458 0x002c00a0 /* EMC_CFG_DIG_DLL */
459 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
460 0x00064000 /* EMC_DLL_XFORM_DQS0 */
461 0x00064000 /* EMC_DLL_XFORM_DQS1 */
462 0x00064000 /* EMC_DLL_XFORM_DQS2 */
463 0x00064000 /* EMC_DLL_XFORM_DQS3 */
464 0x00064000 /* EMC_DLL_XFORM_DQS4 */
465 0x00064000 /* EMC_DLL_XFORM_DQS5 */
466 0x00064000 /* EMC_DLL_XFORM_DQS6 */
467 0x00064000 /* EMC_DLL_XFORM_DQS7 */
468 0x00064000 /* EMC_DLL_XFORM_DQS8 */
469 0x00064000 /* EMC_DLL_XFORM_DQS9 */
470 0x00064000 /* EMC_DLL_XFORM_DQS10 */
471 0x00064000 /* EMC_DLL_XFORM_DQS11 */
472 0x00064000 /* EMC_DLL_XFORM_DQS12 */
473 0x00064000 /* EMC_DLL_XFORM_DQS13 */
474 0x00064000 /* EMC_DLL_XFORM_DQS14 */
475 0x00064000 /* EMC_DLL_XFORM_DQS15 */
476 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
477 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
478 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
479 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
480 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
481 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
482 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
483 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
484 0x00000000 /* EMC_DLL_XFORM_ADDR0 */
485 0x00000000 /* EMC_DLL_XFORM_ADDR1 */
486 0x00000000 /* EMC_DLL_XFORM_ADDR2 */
487 0x00000000 /* EMC_DLL_XFORM_ADDR3 */
488 0x00000000 /* EMC_DLL_XFORM_ADDR4 */
489 0x00000000 /* EMC_DLL_XFORM_ADDR5 */
490 0x00000000 /* EMC_DLL_XFORM_QUSE8 */
491 0x00000000 /* EMC_DLL_XFORM_QUSE9 */
492 0x00000000 /* EMC_DLL_XFORM_QUSE10 */
493 0x00000000 /* EMC_DLL_XFORM_QUSE11 */
494 0x00000000 /* EMC_DLL_XFORM_QUSE12 */
495 0x00000000 /* EMC_DLL_XFORM_QUSE13 */
496 0x00000000 /* EMC_DLL_XFORM_QUSE14 */
497 0x00000000 /* EMC_DLL_XFORM_QUSE15 */
498 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
499 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
500 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
501 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
502 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
503 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
504 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
505 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
506 0x00000000 /* EMC_DLI_TRIM_TXDQS8 */
507 0x00000000 /* EMC_DLI_TRIM_TXDQS9 */
508 0x00000000 /* EMC_DLI_TRIM_TXDQS10 */
509 0x00000000 /* EMC_DLI_TRIM_TXDQS11 */
510 0x00000000 /* EMC_DLI_TRIM_TXDQS12 */
511 0x00000000 /* EMC_DLI_TRIM_TXDQS13 */
512 0x00000000 /* EMC_DLI_TRIM_TXDQS14 */
513 0x00000000 /* EMC_DLI_TRIM_TXDQS15 */
514 0x000fc000 /* EMC_DLL_XFORM_DQ0 */
515 0x000fc000 /* EMC_DLL_XFORM_DQ1 */
516 0x000fc000 /* EMC_DLL_XFORM_DQ2 */
517 0x000fc000 /* EMC_DLL_XFORM_DQ3 */
518 0x0000fc00 /* EMC_DLL_XFORM_DQ4 */
519 0x0000fc00 /* EMC_DLL_XFORM_DQ5 */
520 0x0000fc00 /* EMC_DLL_XFORM_DQ6 */
521 0x0000fc00 /* EMC_DLL_XFORM_DQ7 */
522 0x10000280 /* EMC_XM2CMDPADCTRL */
523 0x00000000 /* EMC_XM2CMDPADCTRL4 */
524 0x00111111 /* EMC_XM2CMDPADCTRL5 */
525 0x00000000 /* EMC_XM2DQPADCTRL2 */
526 0x00000000 /* EMC_XM2DQPADCTRL3 */
527 0x77ffc081 /* EMC_XM2CLKPADCTRL */
528 0x00000e0e /* EMC_XM2CLKPADCTRL2 */
529 0x81f1f108 /* EMC_XM2COMPPADCTRL */
530 0x07070004 /* EMC_XM2VTTGENPADCTRL */
531 0x0000003f /* EMC_XM2VTTGENPADCTRL2 */
532 0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */
533 0x51451400 /* EMC_XM2DQSPADCTRL3 */
534 0x00514514 /* EMC_XM2DQSPADCTRL4 */
535 0x00514514 /* EMC_XM2DQSPADCTRL5 */
536 0x51451400 /* EMC_XM2DQSPADCTRL6 */
537 0x0000003f /* EMC_DSR_VTTGEN_DRV */
538 0x00000007 /* EMC_TXDSRVTTGEN */
539 0x00000000 /* EMC_FBIO_SPARE */
540 0x00000042 /* EMC_ZCAL_WAIT_CNT */
541 0x000e000e /* EMC_MRS_WAIT_CNT2 */
542 0x00000000 /* EMC_CTT */
543 0x00000003 /* EMC_CTT_DURATION */
544 0x0000f2f3 /* EMC_CFG_PIPE */
545 0x800001c5 /* EMC_DYN_SELF_REF_CONTROL */
546 0x0000000a /* EMC_QPOP */