Lines Matching +full:r9a07g044 +full:- +full:cpg

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/renesas,rzg2l-cru.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11   - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
15   color space conversion, LUT, pixel format conversion, etc. An MIPI CSI-2 input and
16   parallel (including ITU-R BT.656) input are provided as the image sensor interface.
21       - enum:
22           - renesas,r9a07g043-cru       # RZ/G2UL
23           - renesas,r9a07g044-cru       # RZ/G2{L,LC}
24           - renesas,r9a07g054-cru       # RZ/V2L
25       - const: renesas,rzg2l-cru
33   interrupt-names:
35       - const: image_conv
36       - const: image_conv_err
37       - const: axi_mst_err
41       - description: CRU Main clock
42       - description: CRU Register access clock
43       - description: CRU image transfer clock
45   clock-names:
47       - const: video
48       - const: apb
49       - const: axi
51   power-domains:
56       - description: CRU_PRESETN reset terminal
57       - description: CRU_ARESETN reset terminal
59   reset-names:
61       - const: presetn
62       - const: aresetn
69         $ref: /schemas/graph.yaml#/$defs/port-base
76             $ref: video-interfaces.yaml#
80               hsync-active: true
81               vsync-active: true
82               bus-width: true
83               data-shift: true
89           CSI-2 receiver.
92   - compatible
93   - reg
94   - interrupts
95   - interrupt-names
96   - clocks
97   - clock-names
98   - resets
99   - reset-names
100   - power-domains
103   - if:
108               - renesas,r9a07g044-cru
109               - renesas,r9a07g054-cru
114             - port@0
115             - port@1
117   - if:
122               - renesas,r9a07g043-cru
130             - port@1
135   # Device node example with CSI-2
136   - |
137     #include <dt-bindings/clock/r9a07g044-cpg.h>
138     #include <dt-bindings/interrupt-controller/arm-gic.h>
141         compatible = "renesas,r9a07g044-cru", "renesas,rzg2l-cru";
146         interrupt-names = "image_conv", "image_conv_err", "axi_mst_err";
147         clocks = <&cpg CPG_MOD R9A07G044_CRU_VCLK>,
148                  <&cpg CPG_MOD R9A07G044_CRU_PCLK>,
149                  <&cpg CPG_MOD R9A07G044_CRU_ACLK>;
150         clock-names = "video", "apb", "axi";
151         power-domains = <&cpg>;
152         resets = <&cpg R9A07G044_CRU_PRESETN>,
153                  <&cpg R9A07G044_CRU_ARESETN>;
154         reset-names = "presetn", "aresetn";
157             #address-cells = <1>;
158             #size-cells = <0>;
161                 #address-cells = <1>;
162                 #size-cells = <0>;
167                     remote-endpoint = <&ov5642>;
168                     hsync-active = <1>;
169                     vsync-active = <1>;
174                 #address-cells = <1>;
175                 #size-cells = <0>;
180                     remote-endpoint = <&csi_cru_in>;