Lines Matching +full:mipi +full:- +full:csi
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nxp,imx-mipi-csi2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX7 and i.MX8 MIPI CSI-2 receiver
10 - Rui Miguel Silva <rmfrfs@gmail.com>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
13 description: |-
14 The NXP i.MX7 and i.MX8 families contain SoCs that include a MIPI CSI-2
19 While the CSI-2 receiver is separate from the MIPI D-PHY IP core, the PHY is
26 - enum:
27 - fsl,imx7-mipi-csi2
28 - fsl,imx8mm-mipi-csi2
29 - items:
30 - enum:
31 - fsl,imx8mp-mipi-csi2
32 - const: fsl,imx8mm-mipi-csi2
43 - description: The peripheral clock (a.k.a. APB clock)
44 - description: The external clock (optionally used as the pixel clock)
45 - description: The MIPI D-PHY clock
46 - description: The AXI clock
48 clock-names:
51 - const: pclk
52 - const: wrap
53 - const: phy
54 - const: axi
56 power-domains:
59 phy-supply:
60 description: The MIPI D-PHY digital power supply
64 - description: MIPI D-PHY slave reset
66 clock-frequency:
75 $ref: /schemas/graph.yaml#/$defs/port-base
78 Input port node, single endpoint describing the CSI-2 transmitter.
82 $ref: video-interfaces.yaml#
86 data-lanes:
88 Note that 'fsl,imx7-mipi-csi2' only supports up to 2 data lines.
91 - const: 1
92 - const: 2
93 - const: 3
94 - const: 4
97 - data-lanes
105 - compatible
106 - reg
107 - interrupts
108 - clocks
109 - clock-names
110 - power-domains
111 - ports
116 - if:
120 const: fsl,imx7-mipi-csi2
123 - phy-supply
124 - resets
129 clock-names:
131 phy-supply: false
135 - |
136 #include <dt-bindings/clock/imx7d-clock.h>
137 #include <dt-bindings/interrupt-controller/arm-gic.h>
138 #include <dt-bindings/interrupt-controller/irq.h>
139 #include <dt-bindings/reset/imx7-reset.h>
141 mipi-csi@30750000 {
142 compatible = "fsl,imx7-mipi-csi2";
149 clock-names = "pclk", "wrap", "phy";
150 clock-frequency = <166000000>;
152 power-domains = <&pgc_mipi_phy>;
153 phy-supply = <®_1p0d>;
157 #address-cells = <1>;
158 #size-cells = <0>;
164 remote-endpoint = <&ov2680_to_mipi>;
165 data-lanes = <1>;
173 remote-endpoint = <&csi_mux_from_mipi_vc0>;
179 - |
180 #include <dt-bindings/clock/imx8mm-clock.h>
181 #include <dt-bindings/interrupt-controller/arm-gic.h>
182 #include <dt-bindings/interrupt-controller/irq.h>
184 mipi-csi@32e30000 {
185 compatible = "fsl,imx8mm-mipi-csi2";
188 clock-frequency = <333000000>;
193 clock-names = "pclk", "wrap", "phy", "axi";
194 power-domains = <&mipi_pd>;
197 #address-cells = <1>;
198 #size-cells = <0>;
204 remote-endpoint = <&imx477_out>;
205 data-lanes = <1 2 3 4>;
213 remote-endpoint = <&csi_in>;