Lines Matching +full:clock +full:- +full:noncontinuous
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eugen Hristev <eugen.hristev@microchip.com>
13 CSI2DC - Camera Serial Interface 2 Demux Controller
19 clock domain towards a parallel interface that can be read by a sensor
30 32-bit IDI interface or a parallel interface.
44 const: microchip,sama7g5-csi2dc
53 clock-names:
55 CSI2DC must have two clocks to function correctly. One clock is the
56 peripheral clock for the inside functionality of the hardware block.
57 This is named 'pclk'. The second clock must be the cross domain clock,
58 in which CSI2DC will perform clock crossing. This clock must be fed
60 Normally this clock should be given by this sensor controller who
61 is also a clock source. This clock is named 'scck', sensor controller clock.
63 - const: pclk
64 - const: scck
69 dma-names:
77 $ref: /schemas/graph.yaml#/$defs/port-base
84 $ref: video-interfaces.yaml#
89 bus-type:
93 bus-width:
97 clock-noncontinuous:
100 Presence of this boolean property decides whether clock is
101 continuous or noncontinuous.
103 remote-endpoint: true
106 $ref: /schemas/graph.yaml#/$defs/port-base
114 $ref: video-interfaces.yaml#
118 bus-type:
122 bus-width:
126 remote-endpoint: true
129 - port@0
130 - port@1
135 - compatible
136 - reg
137 - clocks
138 - clock-names
139 - ports
144 - |
146 compatible = "microchip,sama7g5-csi2dc";
149 clock-names = "pclk", "scck";
152 #address-cells = <1>;
153 #size-cells = <0>;
157 bus-type = <4>; /* MIPI CSI2 D-PHY */
158 remote-endpoint = <&csi2host_out>;
165 remote-endpoint = <&xisc_in>; /* output to sensor controller */
173 - |
174 #include <dt-bindings/dma/at91.h>
176 compatible = "microchip,sama7g5-csi2dc";
179 clock-names = "pclk", "scck";
181 dma-names = "rx";
184 #address-cells = <1>;
185 #size-cells = <0>;
189 remote-endpoint = <&csi2host_out>;