Lines Matching +full:mt8173 +full:- +full:topckgen
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-encoder.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Yunfei Dong <yunfei.dong@mediatek.com>
20 - items:
21 - enum:
22 - mediatek,mt8173-vcodec-enc-vp8
23 - mediatek,mt8173-vcodec-enc
24 - mediatek,mt8183-vcodec-enc
25 - mediatek,mt8188-vcodec-enc
26 - mediatek,mt8192-vcodec-enc
27 - mediatek,mt8195-vcodec-enc
28 - items:
29 - const: mediatek,mt8186-vcodec-enc
30 - const: mediatek,mt8183-vcodec-enc
41 clock-names:
45 assigned-clocks: true
47 assigned-clock-parents: true
66 power-domains:
69 "#address-cells":
72 "#size-cells":
76 - compatible
77 - reg
78 - interrupts
79 - clocks
80 - clock-names
81 - iommus
82 - assigned-clocks
83 - assigned-clock-parents
86 - if:
91 - mediatek,mt8183-vcodec-enc
92 - mediatek,mt8188-vcodec-enc
93 - mediatek,mt8192-vcodec-enc
94 - mediatek,mt8195-vcodec-enc
98 - mediatek,scp
100 - if:
105 - mediatek,mt8173-vcodec-enc-vp8
106 - mediatek,mt8173-vcodec-enc
110 - mediatek,vpu
112 - if:
116 - mediatek,mt8173-vcodec-enc-vp8
124 clock-names:
126 - const: venc_lt_sel
133 clock-names:
135 - const: venc_sel
140 - |
141 #include <dt-bindings/interrupt-controller/arm-gic.h>
142 #include <dt-bindings/clock/mt8173-clk.h>
143 #include <dt-bindings/memory/mt8173-larb-port.h>
144 #include <dt-bindings/interrupt-controller/irq.h>
147 compatible = "mediatek,mt8173-vcodec-enc";
162 clocks = <&topckgen CLK_TOP_VENC_SEL>;
163 clock-names = "venc_sel";
164 assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>;
165 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL>;
169 compatible = "mediatek,mt8173-vcodec-enc-vp8";
182 clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
183 clock-names = "venc_lt_sel";
184 assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
185 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>;