Lines Matching +full:clock +full:- +full:noncontinuous

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marco Felsch <kernel@pengutronix.de>
12 description: |-
13 The Toshiba TC358746 converts a parallel video stream into a MIPI CSI-2
14 stream. The direction can be either parallel-in -> csi-out or csi-in ->
15 parallel-out The chip is programmable through I2C and SPI but the SPI
16 interface is only supported in parallel-in -> csi-out mode.
19 parallel-in -> csi-out path.
30 The phandle to the reference clock source. This corresponds to the
34 clock-names:
37 "#clock-cells":
39 The bridge can act as clock provider for the sensor. To enable this
40 support #clock-cells must be specified. Attention if this feature is used
41 then the mclk rate must be at least: (2 * link-frequency) / 8
42 `------------------´ ^
44 mclk-div
47 clock-output-names:
49 The clock name of the MCLK output, the default name is tc358746-mclk.
52 vddc-supply:
55 vddio-supply:
58 vddmipi-supply:
61 reset-gpios:
71 $ref: /schemas/graph.yaml#/$defs/port-base
77 $ref: /schemas/media/video-interfaces.yaml#
81 hsync-active: true
82 vsync-active: true
83 bus-type:
87 - hsync-active
88 - vsync-active
89 - bus-type
92 $ref: /schemas/graph.yaml#/$defs/port-base
98 $ref: /schemas/media/video-interfaces.yaml#
102 data-lanes:
106 clock-noncontinuous: true
107 link-frequencies: true
110 - data-lanes
111 - link-frequencies
114 - port@0
115 - port@1
118 - compatible
119 - reg
120 - clocks
121 - clock-names
122 - vddc-supply
123 - vddio-supply
124 - vddmipi-supply
125 - ports
130 - |
131 #include <dt-bindings/gpio/gpio.h>
134 #address-cells = <1>;
135 #size-cells = <0>;
137 csi-bridge@e {
142 clock-names = "refclk";
144 reset-gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
146 vddc-supply = <&v1_2d>;
147 vddio-supply = <&v1_8d>;
148 vddmipi-supply = <&v1_2d>;
151 #clock-cells = <0>;
154 #address-cells = <1>;
155 #size-cells = <0>;
161 remote-endpoint = <&sensor_out>;
162 hsync-active = <0>;
163 vsync-active = <0>;
164 bus-type = <5>;
172 remote-endpoint = <&mipi_csi2_in>;
173 data-lanes = <1 2>;
174 clock-noncontinuous;
175 link-frequencies = /bits/ 64 <216000000>;