Lines Matching +full:sun4i +full:- +full:a10 +full:- +full:ccu
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 CMOS Sensor Interface (CSI)
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
13 description: |-
14 The Allwinner A10 and later has a CMOS Sensor Interface to retrieve
20 - const: allwinner,sun4i-a10-csi1
21 - const: allwinner,sun7i-a20-csi0
22 - items:
23 - const: allwinner,sun7i-a20-csi1
24 - const: allwinner,sun4i-a10-csi1
25 - items:
26 - const: allwinner,sun8i-r40-csi0
27 - const: allwinner,sun7i-a20-csi0
37 - items:
38 - description: The CSI interface clock
39 - description: The CSI DRAM clock
41 - items:
42 - description: The CSI interface clock
43 - description: The CSI ISP clock
44 - description: The CSI DRAM clock
46 clock-names:
48 - items:
49 - const: bus
50 - const: ram
52 - items:
53 - const: bus
54 - const: isp
55 - const: ram
67 interconnect-names:
68 const: dma-mem
71 $ref: /schemas/graph.yaml#/$defs/port-base
76 $ref: video-interfaces.yaml#
80 bus-width:
83 data-active: true
84 hsync-active: true
85 pclk-sample: true
86 vsync-active: true
89 - bus-width
90 - data-active
91 - hsync-active
92 - pclk-sample
93 - vsync-active
96 - compatible
97 - reg
98 - interrupts
99 - clocks
104 - |
105 #include <dt-bindings/interrupt-controller/arm-gic.h>
106 #include <dt-bindings/clock/sun7i-a20-ccu.h>
107 #include <dt-bindings/reset/sun4i-a10-ccu.h>
110 compatible = "allwinner,sun7i-a20-csi0";
113 clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;
114 clock-names = "bus", "isp", "ram";
115 resets = <&ccu RST_CSI0>;
119 remote-endpoint = <&ov5640_to_csi>;
120 bus-width = <8>;
121 hsync-active = <1>; /* Active high */
122 vsync-active = <0>; /* Active low */
123 data-active = <1>; /* Active high */
124 pclk-sample = <1>; /* Rising */