Lines Matching +full:iommu +full:- +full:v1
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iommu/qcom,iommu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies legacy IOMMU implementations
10 - Konrad Dybcio <konradybcio@kernel.org>
13 Qualcomm "B" family devices which are not compatible with arm-smmu have
14 a similar looking IOMMU, but without access to the global register space
16 to non-secure vs secure interrupt line.
21 - items:
22 - enum:
23 - qcom,msm8916-iommu
24 - qcom,msm8953-iommu
25 - const: qcom,msm-iommu-v1
26 - items:
27 - enum:
28 - qcom,msm8953-iommu
29 - qcom,msm8976-iommu
30 - const: qcom,msm-iommu-v2
34 - description: Clock required for IOMMU register group access
35 - description: Clock required for underlying bus access
37 clock-names:
39 - const: iface
40 - const: bus
42 power-domains:
50 qcom,iommu-secure-id:
53 The SCM secure ID of the IOMMU instance.
55 '#address-cells':
58 '#size-cells':
61 '#iommu-cells':
65 "^iommu-ctx@[0-9a-f]+$":
71 - qcom,msm-iommu-v1-ns
72 - qcom,msm-iommu-v1-sec
73 - qcom,msm-iommu-v2-ns
74 - qcom,msm-iommu-v2-sec
82 qcom,ctx-asid:
88 - compatible
89 - interrupts
90 - reg
93 - compatible
94 - clocks
95 - clock-names
96 - ranges
97 - '#address-cells'
98 - '#size-cells'
99 - '#iommu-cells'
104 - |
105 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
106 #include <dt-bindings/interrupt-controller/arm-gic.h>
108 apps_iommu: iommu@1e20000 {
109 compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
113 clock-names = "iface", "bus";
114 qcom,iommu-secure-id = <17>;
115 #address-cells = <1>;
116 #size-cells = <1>;
117 #iommu-cells = <1>;
121 iommu-ctx@4000 {
122 compatible = "qcom,msm-iommu-v1-ns";