Lines Matching +full:dsp +full:- +full:irq

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ti,keystone-irq.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Keystone 2 IRQ controller IP
10   - Grygorii Strashko <grygorii.strashko@ti.com>
13   On Keystone SOCs, DSP cores can send interrupts to ARM host using the IRQ
14   controller IP. It provides 28 IRQ signals to ARM. The IRQ handler running on
15   HOST OS can identify DSP signal source by analyzing SRCCx bits in IPCARx
21     const: ti,keystone-irq
26   interrupt-controller: true
28   '#interrupt-cells':
34   ti,syscon-dev:
36     $ref: /schemas/types.yaml#/definitions/phandle-array
38       - items:
39           - description: Phandle to syscon device control registers
40           - description: Offset to control register
43   - compatible
44   - reg
45   - interrupt-controller
46   - '#interrupt-cells'
47   - interrupts
48   - ti,syscon-dev
53   - |
54     #include <dt-bindings/interrupt-controller/arm-gic.h>
56     interrupt-controller@2a0 {
57       compatible = "ti,keystone-irq";
59       ti,syscon-dev = <&devctrl 0x2a0>;
61       interrupt-controller;
62       #interrupt-cells = <1>;