Lines Matching +full:r9a07g044 +full:- +full:cpg
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/renesas,rzg2l-irqc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
15 interrupts of NMI, IRQ, and GPIOINT and the interrupts of the built-in peripheral
17 - IRQ sense select for 8 external interrupts, mapped to 8 GIC SPI interrupts
18 - GPIO pins used as external interrupt input pins, mapped to 32 GIC SPI interrupts
19 - NMI edge select (NMI is not treated as NMI exception and supports fall edge and
20 stand-up edge detection interrupts)
25 - items:
26 - enum:
27 - renesas,r9a07g043u-irqc # RZ/G2UL
28 - renesas,r9a07g044-irqc # RZ/G2{L,LC}
29 - renesas,r9a07g054-irqc # RZ/V2L
30 - renesas,r9a08g045-irqc # RZ/G3S
31 - const: renesas,rzg2l-irqc
33 - const: renesas,r9a07g043f-irqc # RZ/Five
35 '#interrupt-cells':
37 include/dt-bindings/interrupt-controller/irqc-rzg2l.h and the second
41 '#address-cells':
44 interrupt-controller: true
52 - description: NMI interrupt
53 - description: IRQ0 interrupt
54 - description: IRQ1 interrupt
55 - description: IRQ2 interrupt
56 - description: IRQ3 interrupt
57 - description: IRQ4 interrupt
58 - description: IRQ5 interrupt
59 - description: IRQ6 interrupt
60 - description: IRQ7 interrupt
61 - description: GPIO interrupt, TINT0
62 - description: GPIO interrupt, TINT1
63 - description: GPIO interrupt, TINT2
64 - description: GPIO interrupt, TINT3
65 - description: GPIO interrupt, TINT4
66 - description: GPIO interrupt, TINT5
67 - description: GPIO interrupt, TINT6
68 - description: GPIO interrupt, TINT7
69 - description: GPIO interrupt, TINT8
70 - description: GPIO interrupt, TINT9
71 - description: GPIO interrupt, TINT10
72 - description: GPIO interrupt, TINT11
73 - description: GPIO interrupt, TINT12
74 - description: GPIO interrupt, TINT13
75 - description: GPIO interrupt, TINT14
76 - description: GPIO interrupt, TINT15
77 - description: GPIO interrupt, TINT16
78 - description: GPIO interrupt, TINT17
79 - description: GPIO interrupt, TINT18
80 - description: GPIO interrupt, TINT19
81 - description: GPIO interrupt, TINT20
82 - description: GPIO interrupt, TINT21
83 - description: GPIO interrupt, TINT22
84 - description: GPIO interrupt, TINT23
85 - description: GPIO interrupt, TINT24
86 - description: GPIO interrupt, TINT25
87 - description: GPIO interrupt, TINT26
88 - description: GPIO interrupt, TINT27
89 - description: GPIO interrupt, TINT28
90 - description: GPIO interrupt, TINT29
91 - description: GPIO interrupt, TINT30
92 - description: GPIO interrupt, TINT31
93 - description: Bus error interrupt
94 - description: ECCRAM0 or combined ECCRAM0/1 1bit error interrupt
95 - description: ECCRAM0 or combined ECCRAM0/1 2bit error interrupt
96 - description: ECCRAM0 or combined ECCRAM0/1 error overflow interrupt
97 - description: ECCRAM1 1bit error interrupt
98 - description: ECCRAM1 2bit error interrupt
99 - description: ECCRAM1 error overflow interrupt
101 interrupt-names:
104 - const: nmi
105 - const: irq0
106 - const: irq1
107 - const: irq2
108 - const: irq3
109 - const: irq4
110 - const: irq5
111 - const: irq6
112 - const: irq7
113 - const: tint0
114 - const: tint1
115 - const: tint2
116 - const: tint3
117 - const: tint4
118 - const: tint5
119 - const: tint6
120 - const: tint7
121 - const: tint8
122 - const: tint9
123 - const: tint10
124 - const: tint11
125 - const: tint12
126 - const: tint13
127 - const: tint14
128 - const: tint15
129 - const: tint16
130 - const: tint17
131 - const: tint18
132 - const: tint19
133 - const: tint20
134 - const: tint21
135 - const: tint22
136 - const: tint23
137 - const: tint24
138 - const: tint25
139 - const: tint26
140 - const: tint27
141 - const: tint28
142 - const: tint29
143 - const: tint30
144 - const: tint31
145 - const: bus-err
146 - const: ec7tie1-0
147 - const: ec7tie2-0
148 - const: ec7tiovf-0
149 - const: ec7tie1-1
150 - const: ec7tie2-1
151 - const: ec7tiovf-1
156 clock-names:
158 - const: clk
159 - const: pclk
161 power-domains:
168 - compatible
169 - '#interrupt-cells'
170 - '#address-cells'
171 - interrupt-controller
172 - reg
173 - interrupts
174 - interrupt-names
175 - clocks
176 - clock-names
177 - power-domains
178 - resets
181 - $ref: /schemas/interrupt-controller.yaml#
183 - if:
188 - renesas,r9a08g045-irqc
193 interrupt-names:
199 interrupt-names:
205 - |
206 #include <dt-bindings/interrupt-controller/arm-gic.h>
207 #include <dt-bindings/clock/r9a07g044-cpg.h>
209 irqc: interrupt-controller@110a0000 {
210 compatible = "renesas,r9a07g044-irqc", "renesas,rzg2l-irqc";
212 #interrupt-cells = <2>;
213 #address-cells = <0>;
214 interrupt-controller;
263 interrupt-names = "nmi",
274 "bus-err", "ec7tie1-0", "ec7tie2-0",
275 "ec7tiovf-0", "ec7tie1-1", "ec7tie2-1",
276 "ec7tiovf-1";
277 clocks = <&cpg CPG_MOD R9A07G044_IA55_CLK>,
278 <&cpg CPG_MOD R9A07G044_IA55_PCLK>;
279 clock-names = "clk", "pclk";
280 power-domains = <&cpg>;
281 resets = <&cpg R9A07G044_IA55_RESETN>;