Lines Matching full:msi

1 This document describes the generic device tree binding for MSI controllers and
9 those busses to the MSI controllers which they are capable of using,
17   they can address. An MSI controller may feature a number of doorbells.
22   MSI controllers may have restrictions on permitted payloads.
28   MSI controller and device rather than a property of either in isolation).
31 MSI controllers:
34 An MSI controller signals interrupts to a CPU when a write is made to an MMIO
35 address by some master. An MSI controller may feature a number of doorbells.
40 - msi-controller: Identifies the node as an MSI controller.
45 - #msi-cells: The number of cells in an msi-specifier, required if not zero.
50   The meaning of the msi-specifier is defined by the device tree binding of
51   the specific MSI controller. 
54 MSI clients
57 MSI clients are devices which generate MSIs. For each MSI they wish to
64 - msi-parent: A list of phandle + msi-specifier pairs, one for each MSI
68   MSI controllers listed in the msi-parent property.
73   When #msi-cells is non-zero, busses with an msi-parent will require
85 	msi_a: msi-controller@a {
88 		msi-controller;
89 		/* No sideband data, so #msi-cells omitted */
92 	msi_b: msi-controller@b {
95 		msi-controller;
97 		#msi-cells = <1>;
100 	msi_c: msi-controller@c {
103 		msi-controller;
105 		#msi-cells = <1>;
113 		msi-parent = <&msi_a>;
123 		msi-parent = <&msi_a>, <&msi_b 0x17>;
130 		 * Has different IDs at each MSI controller.
131 		 * Can generate MSIs to all of the MSI controllers.
133 		msi-parent = <&msi_a>, <&msi_b 0x17>, <&msi_c 0x53>;