Lines Matching +full:channel +full:- +full:7
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs
10 - Jonathan Cameron <jic23@kernel.org>
14 24-bit, delta-sigma, analog-to-digital converters (ADCs) with a
15 built-in programmable gain amplifier (PGA), internal reference
24 - ti,ads131e04
25 - ti,ads131e06
26 - ti,ads131e08
31 spi-cpha: true
39 clock-names:
41 - const: adc-clk
48 vref-supply:
53 ti,vref-internal:
59 Note: internal voltage reference is used only if vref-supply is not supplied.
64 '#address-cells':
67 '#size-cells':
71 - compatible
72 - reg
73 - spi-cpha
74 - clocks
75 - clock-names
76 - interrupts
79 "^channel@([0-7])$":
88 The channel number.
91 Up to 8 channels, numbered from 0 to 7 for ti,ads131e08.
94 maximum: 7
98 The PGA gain value for the channel.
106 Channel input selection(muliplexer).
117 - reg
122 - $ref: /schemas/spi/spi-peripheral-props.yaml#
127 - |
128 #include <dt-bindings/interrupt-controller/irq.h>
131 #address-cells = <1>;
132 #size-cells = <0>;
137 spi-max-frequency = <1000000>;
138 spi-cpha;
140 clock-names = "adc-clk";
141 interrupt-parent = <&gpio5>;
143 vref-supply = <&adc_vref>;
145 #address-cells = <1>;
146 #size-cells = <0>;
148 channel@0 {
152 channel@1 {
156 channel@2 {
161 channel@3 {
165 channel@4 {
169 channel@5 {
173 channel@6 {
177 channel@7 {
178 reg = <7>;